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How to make flip-flop (frequency-divider) with schmitt inverter?

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Ideally, i'm looking for a simple frequency divider that i can feed a square wave, using only schmitt inverters or schmitt NAND (just one if possible). Should work over a wide input-frequency range.

The posts below provide a schematic for a so-called "flip-flop" (which i think is really a toggle, not a flip-flop) using two schmitt inverters.


The circuit is based on a switch, not a clock, so would not work as-is for my need. But, maybe someone can see a way to make this work as a divider with a clock-input instead of a switch? Or, some alternate flip-flop circuit using schmitts?

I wired up the above circuit in falstad

  • Seems highly sensitive to input on-time.
  • Getting strange oscillations.
Pressing the switch manually, i sort of get a toggle, sometimes. Seems to depend on how long i hold the switch, and maybe how long i wait between presses, and whether i'm going from low to high or high to low. Also, i seem to get a very high frequency oscillation while holding the switch. Am i doing something wrong?

Any ideas for a true flip-flop divider based on Schmitts?



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It's difficult to use such a circuit over a wide frequency range since it depends upon RC delays for proper operation..
Much easier to just us a D-flipflop with the D input connected to the /Q output.


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no easy, wide-frequency way
you never know until you occasionally somewhere run to it - some setup of T-flop might just do what you need

by Google iS . . . the good question here is where to get the BUTTON with the right "Moment" . . . the 100k somewhat incorporates here . . . donno ← an idea level design (in latch setup the button would be the 3-rd transistor) while the Bjt v. has only 2
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Here is the simplest, "real", divide-by-2 circuit made from gates. It is properly edge-triggered, and changes on rising-edges. It can be built from almost any logic family, provided that the max frequency is consistent with the gate delays.



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