Synching Quartz Master clock to DCF77/MSF

[dougy83]

I have changed the values of VR1 and C1 (on my diagram) to 50k and 100µF as IC2a was being held low.

You mean VR2? C1 should be 10uF as it (along with R1) set the length of the output pulse and IC2a output is used for a number of functions. 4k7 * 100u --> ~0.47 seconds. It will require a few 100ms pulses before the 100u cap is charged. You should either decrease R1, or use a 500k pot and 10u cap (as per original). If IC2a (input) was being held low, it's because the pot was set too low.

The circuit works fine if I disconnect R7 (R4 on dougy83's diagram) where it goes to IC2d and connect R7 to +ve.

The inverter IC2d with R7 disconnected is perm high on it's output.

If the inverter output is always high, then it should have the same effect as connecting R7 to +ve. I don't believe this is the case, see next paragraph.

Can anyone explain how the 2 RC combinations C7&R9 (R12&C8)and R8&C8 (R11&C7) work in this circuit so I can work out what components require changing?

R9 is just a pull-down, not a timing element (well not much).
R10*C7: C7 goes high if an input second pulse is high for too long: this is an unexpected/signal-faulty condition. It discharges during the gaps between pulses.
R8*C8: C8 goes high a second or so after the 2 second break has been detected: this is an unexpected/signal-faulty condition. As C1 has been increased without changing R1, IC2a output will be high for >4 seconds while C1 is charged with 100ms pulses each second. This will mean that C8 will have ample time to charge, and IC2d will go low after a break, resetting the counter. C8 discharges after the first pulse after a excessively long break or signal dropout (if C1 was correct).

I think R8 & C8 will charge for a pulse longer than a second so that will be 2 seconds as IC2a only goes high after a 1 sec pulse?

IC2a? Oh, on my diagram this time I'm only going to reference components as per your diagram.
IC2a goes high after ~1.7 seconds of no pulses, and stays high until halfway through the first pulse (if R1*C1 is correct). It goes low halfway through the first pulse after a long break. Therefore IC3a is high for the first half of the the first pulse after a long break.

R8C8 determine how long after the 1.7 seconds a break is allowed to take. If it's too long, IC2a goes low and resets the counter.

Does C7 only discharge on very long pulses over 4 seconds so normally IC2d OP would be low?

C7 discharges between 100/200ms pulses.

I suppose I could disconnect each RC combination in turn where it goes into IC2d and see which one is the culprit. Then adjust values to make it work.

Try fixing C1 first!

If the IC2d input impedance is crap, you can scale R8/9/10 down 100 times, and scale up C7/8 100 times.

Thanks in advance. Brett.

No worries. All the best.

 

[dougy83]

I think I have a few synapses misfiring...

First, fix C1.

Next, connect R7 to +ve. This will stop my fault detect circuit allowing the counter to go haywire when there is a fault (not the desired result).

The fault detect (active low) output - IC2d - needs to be connected to the counter reset (through an transistor inverter). Use a resistor (10k is fine) from IC2d O/P to the base of a new PNP transistor 'Q1'. Q1 emitter to +ve. Q1 collector to IC1 reset.

 

[Mr RB]

I'd like to add a bit of general info to Dougy83's help, re the RC filters you can just leave the C disconnected (not soldered in) until you check everything works ok.

Then solder in the C to make the RC filters work, they are easy to "tune" on the oscilloscope as you can see the voltage rise/fall over time. With most CMOS these days they have input triggering hysteresis about 1/4 of Vcc and 3/4 of Vcc, so if you use dual traces on the cro it's very easy to see what the filter voltage is doing vs the output of the schmidt inverter.

 

[dougy83]

Not sure which 'C' you're on about... They're all there for a reason. Also, the schitt trigger is likely to trigger at 1/3 & 2/3 rail.

**broken link removed**

 

[oliverb]

I think I have a few synapses misfiring...

First, fix C1.

Next, connect R7 to +ve. This will stop my fault detect circuit allowing the counter to go haywire when there is a fault (not the desired result).

The fault detect (active low) output - IC2d - needs to be connected to the counter reset (through an transistor inverter). Use a resistor (10k is fine) from IC2d O/P to the base of a new PNP transistor 'Q1'. Q1 emitter to +ve. Q1 collector to IC1 reset.

Thanks again dougy83 & Mr RB.
Just shows how rusty my circuit knoledge is.
I had already disconnected R7 and connected it to the +ve to isolate the error detecting part of the circuit so that is not a problem.
edit Will fix C1 R1 as well.



Thanks Brett.

 

[dougy83]

I have a couple of spare gates on IC3 if I short the IPs and make an inverter could I use them instead of the transistor?

You could try using one of the spare AND gates instead of the schmitt trigger inverter and transistor, but because the AND gate doesn't have a schmitt trigger input and the voltage to the input of the gate has a very slow rise/fall time, I wouldn't recommend doing it. The AND gate wouldn't like it, and the switching could possibly (?? not sure ??) be somewhat erratic.

If you did use the AND gate, you'd need to connect a series diode on the output to allow it to combine with the other reset signals.

 

[oliverb]

I have put back C1 and played around with the values for VR1 (says VR2 on my diagram but is VR1) and got the circuit working OK without IC2d in for now.

I have another Schmitt inverter IC so could use it on the output of IC2d.

With all this playing around looking for pulses I have been thinking about using some LEDs to monitor them in the finished clock.
It would be nice to see the 1 sec pulse , the count to 58 off the common connected diodes, the 1 min pulse and the 1 sec second gap in Green LEDs with an Red error LED for a long pulse.

These LEDs would also make setup much simpler.

If I add another Schmitt inverter I could use the spare gates to drive LEDs via transistors. I'd would prob add a switch to turn pulse monitoring off as well.

 

[Mr RB]

I like the LEDs idea.

You must have a HEAP of chips in this now...

 

[oliverb]

So much for keeping it simple! Still with 4 chips its only a few hour worth of wiring. I think I can squeeze the board in behind my master clock case in a false bottom.

My master clock was based very loosely on an old electronic pulse clock from a telephone exchange. This clock has a row of LEDs each one was lit as each pulse was generated and a relay operated. It looked good and sounded even better.


The ideal case for the whole clock would be an old 12" or 10" school clock case, I like the idea of old and new together.


Once I get the circuit working I will give it a long term test over a few months on an old clock in my workshop before taking down my master.

 

[oliverb]

Phew. In between working, cutting the grass and sitting in the garden I have now added LEDs to monitor some of the outputs.

Will have a play over the next few days and see if I can get it set up and running.

Edit if I find I need some more inverters I could use a spare AND gate to monitor the 1 min pulse.

edit see diagram C1= 10microF R1 =500K , Vero layout C8 above IC3 should be C6

On testing C6 should be 1microF.

 

[oliverb]

Circit test

Gave the circuit a quick power up this evening and found the "Frame sync" and "Pulse Error" LEDs lit.

Once the DCF77 started generating pulses the 1 sec pulse LED flashed in time to the pulses. 100ms and 200ms pulses could be clearly seen (you could prob tell the time from these with a bit of practise). After a few pulses the "Frame Sync" and "Pulse Error" LED went off.

Every thing was fine until the 1.7 sec gap the "Frame sync" led came on as expected very closely followed by the "Pulse Error" LED.

I checked R8 and found I had been supplied with a 100ohm not a 1M resister. I double checked all resisters out of the packet with my meter before installing but must of missed this one. At least it made the extra work fitting the LEDs worth while.

After replacing the resister the circuit cycled correctly and the "1 min pulse LED" flashed to show a full cycle. I'm not sure the circuit reset itself correctly as the 2nd cycle failed.

Will have to investigate this further...........

edit while checking this circuit it is best to have a radio clock running next to it to see where in the 1 min cycle the circuit is.

 

[Mr RB]

It lives!!!! ... Well almost.

You do know that after this masterpiece is all beautifully finished and operating perfectly you will be bored again?

 

[oliverb]

Yeah, funny you should say that.

Always wanted one of these flip calendar clocks. Would look nice in a 12" wooden case.

I bet my master can drive it with a few mods..................................

 

[oliverb]

Circuit is now up and running. I changed C6 to 1 microF as I could not get IC2f to trigger off the DCF77 pulses with the 10 or a 4.7 microF capacitor. The main thing is there have been no false 1 min pulses even when I position the receiver at the edge of reception.

I have mounted the 4 LEDs in a temp panel and have set the panel in view in my living room so I can keep an eye on it over the next few days.

The DCF77 unit from Ebay seems to work well. I have it mounted inside at present on the far side of the house away from the Frankfurt transmitter. The perm position will prob be on an outside South facing wall mounted in a waterproof box on a rotating bracket.

Using the Frame sync and Pulse error LEDs it is very easy to find the best direction for the DCF77 receiver.


To do the final tuning of the RC elements of my decoder I will need to borrow a pulse generator to send out some error pulses (or knock up a basic one on bread board).

I will try to write up a full description of this circuit while it is fresh in my mind over the next day or so.

Thanks everyone for all your comments, suggestions and knowledge passed on to me in this thread. I feel like I have learnt loads and now have a great deal of confidence this circuit will work.

Brett.

 

[oliverb]

I have enclosed a mock-up of what my master clock will look like with the Pulse Monitor LEDs added.

Also enclosed a word doc describing the circuit as best I could.

There are bound to be errors due to my bad typing and more likely my lack of knowledge of electrical principles so please let me know.

The decoder is still running well with no error 1 min pulses. I have still got to fine tune the circuit to make sure the correct pulses are accepted or rejected to maximize reliability so some of the component values may change.

I will then connect it to an old master clock for long term testing before final connection to my master.

 

[Mr RB]

Thanks for the .zip file, i've saved it for posterity.

If you are after another clock project, I developed a "standard" for binary clock faces;
The "Black Standard" for binary clock faces
This arranges the shapes and sizes of the binary segments so that it does not need "indicators" ie it is the only binary clock display that you can read in the dark with no indicators (to show which binary bit is which). And it has more of a "face" shape so it suits cosmetic installations.

I also have a working Windows version so you can see the little binary clock in action;
A freeware Windows binary clock

There is also source code there for making a binary clock etc if you ever want to get into PIC microcontrollers, I know you're an expert with digital logic etc but there's something to be said for just using one PIC chip to do everything, and adding a new feature is just a matter of tweaking software.

 

[wombweller]

Hi Oliver

Great new you got it running ok!! hope it performs as you expect under test.

RB.
Great website you have there!! I particually like the xtal oven and the Zero-error 1 second Timer they will be very usful.

Cheers!!

 

[oliverb]

Very interesting site Mr RB and very original idea for a binary clock.
I am def looking into PICs. Perhaps I should build a calendar slave using PICs rather than a flip clock.

I'll have a bit of a read up in the micro controller section of this forum and maybe get a book.

DCF77 decoder update.
The DCF77 module does not like modern low wattage light bulbs or LCD TVs. Each time the module is close I get multiple pulse break and long pulse errors. I left the receiver near my LCD TV for around 4 hours this morning and although there were many errors there were no false 1 min pulses.

 

[wombweller]

Very interesting site Mr RB and very original idea for a binary clock.
I am def looking into PICs. Perhaps I should build a calendar slave using PICs rather than a flip clock.

Hi Oliver

I made myself a calender slave from a std. 30 sec slave movement.I did it this way as I wanted to retain some mechanics within my project.

I took the 120 toothed wheel out of the slave and had a 31 toothed wheel cut and fitted this into the slave movement.To give this calender slave a 24 hr impulse I again used mechanics and used a small gpo.programmer, you could use electronics for this I suppose.

To get the calendar salve to adjust to to days in months and leap years a friend of mine wrote a programme to put on to a PIC. The PIC. circuit goes between the programmer and the slave so the programmer actually gives the PIC. a 24 hr pulse and then the PIC. gives the slave what it requires and when.

I am feeling that you are a little like I am, you want to put in some mechanics and some electronics.

Cheers!!

 

[oliverb]

Yeah your are right I do like electronics and mechanics together.
I could use a PIC as an electronic "gear" and divide up a 60 segment dial to get the 31 days in a month. The PIC could then step out the remaining unused segments depending on the days in the month at midnight.

Prob use quartz motors as they are noisless.

Will get to work drawing out some displays.