Internal pull-ups enabled during reset

[alphacat]

Hello.
I'd like to use a 8051 microcontroller from TI, and it says in its datasheet that:
"All digital pins have the internal pull-up resistor enabled during reset".

This doesnt happen in the current 8051 microcontroller I'm using, and I'm afraid it might cause me a problem.

Currently, there are 2 digital pins that are configured as outputs, and they drive a MOSFET-based H-bridge (the H-bridge has 2 inputs which are the 2 digital pins - the 2 digital pins drive the gates of the 4 MOSFETS).

The design of the H-bridge says that the two inputs must not be 1-Logic at the same time, since it will short the VDD to ground (through the Source-Drain conducting channels).

If I use now the new 8051 microcontroller, will the VDD be shorted to ground every time a reset occurs?
Meaning, I cannot use that 8051 microcontroller? (any way to overcome it?)

Thank you very much.

 

[Sceadwian]

You could add an external pull down that will keep the voltage developed from the internal pullup from triggering the mosfet bridge. You just need to make sure that the pulldown isn't so strong that it keeps the micro controllers normal output from triggering the bridge. Do you follow that?

 

[alphacat]

Hello.

Thank you very much Sceadwian.

The digital pins' pull-up/down resistors are 20Kohm (typical) (That is according to datasheet).

About selecting R_Pdown:

On the one hand, its all about voltage divider, so i'd want it to small enough so VDD * R_Pdown / (R_Pdown + R_Pup) will be close enough to zero. (R_Pup = 20Kohm Typ).

On the other hand, I need to ensure that the digital pin can source a current of VDD / R_Pdown < I_Soruce(max), right?

Are these the two equations that should give me the solution for R_Pdown?

Thank you.

 

[Sceadwian]

Depends on the micro controller or circuit in question. Some internal pullups are based on passive parasitic FET gates which actually act more like constant current sources of 1ua or so rather than as actual resistors.
If you need to ensure the value of the pulldown that you need to use there's no excuse for you not to actually test the I/O pin(s) in question to find out. Datasheets often do not carry the data a user wants because an engineer can't anticipate every possible usage the chip can encounter and often times the use in which a person puts any particular chip is not one for which it was specifically engineered for. This is the cost of using a general purpose MCU.

 

[Hayato]

You could improve your H-Bridge. Adding some sort JK latch, with toggling enabled (with the uC driving the J input and with K=1, for example). Doing that you just use 1 uC pin to drive the whole H-Bridge.

 

[alphacat]

Hey.

@Sceadwian
Thank you very much.
I'll surely try it out.

@Hayato.
Its a nice Idea.

However, I dont think you can do that since the inputs of the H-bridge have 3 states , not two.
0,0 - No current.
0,1 - Current flows in direction A.
1,0 - Current flows in direction B (B is opposite to A).

(1,1 - VDD is shorted to GND - forbidden state).

 

[Hayato]

No problem. Just add another logic. When "EN" pin is high, there is 0->1 or 1->0 changes. When "EN" pin is low, the only output is 0.

 

[alphacat]

So you need now two pins - one for EN and another for J.

 

[kchriste]

You could solve it with a single logic level FET. Connect the gate to one output, the drain to another, and the source to ground. This will also protect against the "forbidden state" if the micro goes rogue. The motor could run in one direction when in the reset state. If that is not acceptable, then Hayato's idea is the way to go.

 

[Hayato]

So you need now two pins - one for EN and another for J.

Yes, but you don't risk getting the forbidden state.


@kchriste
=D

 

[alphacat]

@Hayato
The problem still remains - every time a reset occurs, the GPIOs will trigger the H-bridge.
They might not cause VDD to be shorted to GND, but they will trigger the H-bridge which is not good.
So even with a JK-FF (with EN entry), I still need external pull-down resistors (hopefully they'd work).

 

[Hayato]

Nope. they would not need. Just use negative logic.

If the EN pin is high, the H-Bridge is disabled, and vice-versa.

Do not use the pull-downs you are thinking of. They will overload your uC outputs and that's very bad. Any situation you think can be solved by an elegant way, not brute-force.

 

[alphacat]

Thank you very much, you're right.

Its a good thinking.