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Help with backup circuit for digital clock

Discussion in 'Electronic Projects Design/Ideas/Reviews' started by the_engineeer, Apr 1, 2016.

  1. the_engineeer

    the_engineeer Member

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    Hello!
    I am building a digital clock using the schematic on this page: http://danyk.cz/hodiny2_en.html
    A neat thing to add would be a backup capacitor in case of a power failure, but I have never used these before so I'm not sure how to properly add one to my build. The space available is small width- and heightwise so only a 0.47F fits, but it is however quite long so there is room for up to three 0.47F in a row.
    Then again, I read somewhere that it isn't always a good idea to parallell supercaps so I wanted to know your thoughts on the matter.
    Also, if my "capacitor circuit" below is correct, how do I calculate a fitting value for R?
    As you can see, my idea is to only have the clock circuit backed up and not the actual LED display.

    1cap.png 3caps.png
     
  2. MikeMl

    MikeMl Well-Known Member Most Helpful Member

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    Make it easy on yourself, use CMOS chips for the counters... It will take a large SLA battery to keep those TTL chips going for any length of time...

    Another problem is that you will need tri-state buffers between the counters and the displays, if you want to keep the counters running without the displays being powered.
     
  3. the_engineeer

    the_engineeer Member

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    OK, so basically I'm screwed :D
    Seriously though, if the displays go powerless the counters stop?
    How would such a buffer circuit look?
    Btw, my goal with the backup is just to cope with shorter power failures, a couple of hours runtime would be OK for me...
     
  4. dave

    Dave New Member

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  5. Diver300

    Diver300 Well-Known Member

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    I have some SO16 74HC192 ICs if you need them. I don't think that they are made any more in that package.

    Availability of the parts may be a problem. The datasheets for the display and the counter were first written 44 years ago in 1972.

    Mike is correct that you need some buffers to the displays if you want to turn them off. They don't have to be tri-state. You could use AND gates and force all the outputs low at the same time as turning off the power to the displays. If you don't have some sort of buffer, the TIL311 displays will try to take power from the outputs of the 74??192 counters, so the power consumption will be far more than you expect and it may upset or damage the counters.

    Also, if you use 74LS192 or 74192 counters, they are only guaranteed to work down to 4.75 V, so they might not work with the diode in the way, and they will stop working while there is still a lot of voltage in the capacitors. The 74HC192 will work to 2 V, and take far less current, so it is the obvious choice.

    R should be large enough not to overload the supply or the diode when the capacitor is flat. It really isn't critical and 1 kΩ would be fine, although charging the capacitors would be slow. If you went to 100 Ω, there would be 50 mA or less charging the capacitors when they are flat, and the capacitors would be fully charged in 10 minutes or so.
     
  6. alec_t

    alec_t Well-Known Member Most Helpful Member

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    As per the datasheet the LED supply is separate from the logic supply Vcc in the display chips, so you could remove the LED supply safely. That would ~halve the power consumption of those chips. Not sure what the effect of removing Vcc for those chips would be though. Without buffering, that might load the counters enough to prevent them working properly.
     
  7. the_engineeer

    the_engineeer Member

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    I'm building version 2 with 74HC390 counters, also I'm not using TIL311 displays because I have found about 60 HP5082 chips in the recycling bin at my job :happy:
    But I guess the question still remains - will the displays try to draw power from the counters when their Vcc disappears..?

    Display datasheet:
    http://web.mit.edu/6.s28/www/datasheets/HP_led_display.pdf

    Here's my schematic:
    schematic.png
     
    Last edited: Apr 1, 2016
  8. MikeMl

    MikeMl Well-Known Member Most Helpful Member

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    Yes

    You could put one Schottky diode in each ABCD input (cathode pointing at the CMOS counter) to prevent the back-feed.

    With the displays off, the CMOS counter chain could operate on a few 10s of uA.
     
  9. spec

    spec Well-Known Member Most Helpful Member

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    Hi engineeer,

    Welcome to ETO; you will find a lot of people with similar interests to you here.
    It would be helpful to us if you could fill in your location on your profile (not your specific address though).

    To answer your questions, and I am taking the clock circuit that you have described in the above posts:

    There is absolutely no problem connecting supercaps in parallel. You can evel parallel different values from different manufacturers, provided, of course that you do not exceed the working voltage of any one capacitor in the parallel bank. There are problems connecting any capacitors in series though, not just supercaps.

    Your circuit is correct, although not optimum. The value of R simply defines how long the supercap bank will take to charge back up to its maximum backup voltage, once the mains supply is restored. The minimum time is limited by the current available from your power supply and also by the maximum charging current of the supercap bank. I don't see this as a critical area and the value of R can be calculated quite simply further down the line when more information is available.

    The attached Word .doc file shows the calculations for the size of supercap bank you would need to meet your 4 hour backup duration. I have taken spec sheet figures to calculate the total current taken from the supply line by the oscillator and counter chips, and this will probably be pessimistic so you might consider measuring the actual current taken and use that in the equation to arrive at the value of supercap needed. If you have any actual supercap types in mind, it would be handy if you could post a description.

    The principle I have used is that the clock chips will operate from a supply line of between 3V and 6V, so 3V is the amount of voltage drop the capacitor can have while still maintaining the oscillator and counter functions.

    To use this approach and your circuit, you would need a 6.4V DC supply and an extra diode in line with the 6.4V supply to drop it to 6V, which would be the voltage that the supercap bank would initially supply. UPDATE: I see that highest voltage that commonly available supercaps will stand is 5.5V, so that will have to be the maximum backup voltage. This implies a maximum backup drop of 5.5V to 3V = 2.5V, rather than 3V as stated in the attached word document.

    I have just given the basics of this approach and there may be errors- there normally is with my designs- but this data will allow you to consider the design. No doubt, there will be a few details to sort out.

    There are other, more complicated approaches, that would allow you to use a smaller capacitor bank. Also, you could consider using a rechargeable battery, which would be a far superior approach; sorry.

    This clock design takes me back to when I built a similar circuit in the 1970s, a counter using the same hp display chips.:)

    spec
     

    Attached Files:

    Last edited: Apr 1, 2016
  10. the_engineeer

    the_engineeer Member

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    Thanks for all help!
    The caps I'm going to use are 0.47F/5.5V, and since parallelling them isn't a problem I will use 3 of them. If 4.9F will give me 4hrs, my 1.41F bank will only give me about 1 hour - which is totally OK by me.
    I have thought of using a battery, but I want this circuit to be absolutely maintenance free, and battery changes isn't...
    The suggestion of using AND gates as buffers is interesting, I'll probably redesign my project with that in mind. If I'm not mistaken, I can use the display Vcc as input A for all gates, and the binary data from the counters as input B. This should result in all zeros to all binary inputs on the displays when Vcc disappears. (I hope...)

    PS:
    If anyone needs some 5082 displays, drop me a line.
    I have at least 50 that I don't need. Mostly 7300's, but also about 10 7304's and a few 7302's...
     
  11. spec

    spec Well-Known Member Most Helpful Member

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    Hi engineer,

    As far as I can tell, this looks like a nice project and the supercap approach should work well. It would be necessary to increase the 5V power line to 5.9V for best performance.

    But about the battery approach, there would be no maintenance. A 50ma/h LiIon battery charged from 4V to 4.1V from the 5V supply would have a pretty much infinite life and would give you a long back up time too- I haven't worked it out, but probably days. The battery would act just like a huge capacity supercap, but would only cost around £3 UK. It would also be very small, smaller than 3 supercaps I think. The single chip required to keep the battery charged would be about £2.50 UK and would be tiny. A few other components, R & Cs and perhaps a small transistor, and job done. That would be the way that I would recommend. :cool:

    I will do a design for both approaches and you can chose the one you like best

    spec
     
    Last edited: Apr 1, 2016
  12. audioguru

    audioguru Well-Known Member Most Helpful Member

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    Clocks and clock radios made in the last 20 or 30 years use an inexpensive 9V alkaline battery for backup power to the counters if the mains power fails. The 9V alkaline battery in my clock radio was installed in it TEN YEARS AGO and it still powers the counters perfectly. It measures 7.5V with the 10M load of my multimeter which might be the load of the counters.

    EDIT: Gasp, choke. TTL ICs???? That was 40 or 50 years ago. They eat a lot of current. I don't think TTL logic was ever used in a clock or clock radio.
     
    Last edited: Apr 1, 2016
  13. the_engineeer

    the_engineeer Member

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    OK, you sold me on the LiIon battery variant, I'll be most thankful for that design! :happy::happy::happy:
     
  14. spec

    spec Well-Known Member Most Helpful Member

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    The oscillator and counters are CMOS AG.

    I recon they take around 340uA worst case going by the data sheet, but in practice the current would probably be a lot lower

    spec
     
  15. spec

    spec Well-Known Member Most Helpful Member

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    OK engineer,

    by the way, according to my calculations, a 50mA/hr LiIon battery should run the oscillator and counters (if the displays do not load the counter output lines) for 147hrs= 6 days.

    spec
     
  16. KeepItSimpleStupid

    KeepItSimpleStupid Well-Known Member Most Helpful Member

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  17. the_engineeer

    the_engineeer Member

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    Here's a part of my revised schematic with AND gate buffers. This should keep the display from loading the counters when the power is gone, right?

    buffers.png

    I found a nice low voltage quad gate that accepts 1.2V-5V on the inputs: http://www.onsemi.com/pub_link/Collateral/74LVC08A-D.PDF
     
  18. spec

    spec Well-Known Member Most Helpful Member

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  19. spec

    spec Well-Known Member Most Helpful Member

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    Will have a look- bed time now. :wideyed:

    spec
     
  20. the_engineeer

    the_engineeer Member

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    Well, not really... But perhaps after my buffer redesign I will have more room.
    Will it work with a LiPo battery, by the way? If so, there's many to choose from and a 130mAh is only 40 x 7 x 11 mm - about the same size as my 3 caps :happy:
     
  21. Diver300

    Diver300 Well-Known Member

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    The 74LVC08A isn't rated to run with a 5 V supply. It wouldn't be damaged as the absolute maximum supply voltage is 6.5 V, but they might not work correctly. Probably more importantly, they are not available in a DIL package.

    To buffer the output of the 74HC390, your first choice would normally be the same technology, the 74HC08. You would be better to use the 74HC08 than the 74HCT08 because the 74HC08 will work over a wider voltage range. The 74HCT08 is designed to accept TTL levels on its input when running from 5 V, so its high level input voltage threshold is quite a lot lower than the 74HC08, but that is the only difference.

    Your connection to the displays is only outputs to the displays, not the other way round, so you don't need the lower input voltage threshold, but you would gain from known behaviour, matching the 74HC390, all the way down to 2 V supply.

    If you do use the Li-Ion cell, you mustn't exceed 4.2 V, or it is likely to be damaged. You are also supposed to stop charging when the current falls below 0.02 C (2.4 mA) or if the temperature exceeds 45 °C. The charging current should not be more than 60 mA.

    I think that the supercapacitor will give adequate performance and be easier to work with.
     

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