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Digital circuit inputs turn on thresholds, turn on voltage?

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Cmos logic chips DO NOT use pullup or pulldown resistors. The chips use a resistor in series with each input to protect from damage from static.
 
At my work they use pull up and pull down resistors for every input and output for each Logic IC chips, logic gates, any reason why? all i can think of is if there was noise on the inputs or outputs

I do see schmitt triggers and hex schmitt inverters have a RC network either on the inputs or outputs, its either a RC high pass or RC low pass, what are they used for?


The output is either a high or low state, but what does those RC networks do?
 
If there was noise on the inputs or outputs to cause the IC to have false transitions or logic states

I'm guessing pull up or pull down resistors correct and force the false logic states to not happen
 
That is hard to tell without a schematic, but maybe it is a "tradition".
The RC filters may be used when you have a high speed logic IC driving a long trace to reduce EMI, because it slows down the rise/fall times at the transitions.
Can you post a schematic so we have a something tangible to refer to?

Like I said, the pullups function depends if the I/Os are going to the outside world or are between chips.
 
IMG_20130325_190917_063.jpg
 
That looks like some really ancient technology. The eight diodes are used to protect the IC from voltage on the input that is below ground, the resistors make a low state when the switch is off.
The RC network with the diode is an edge detector, it provides a short high pulse when the output of the schmitt trigger goes from low to high. The diode againg protects from negaitve voltage when the schmitt triger goes from high to low, creating a path to discharge the capacitor.
In the last one I see two RC delay setups, and something that looks like a power-on reset pulse generator.
 
Thanks for your info and Help

The eight diodes are used to protect the IC from voltage on the input that is below ground.

What u mean below ground? how does it protect the IC , its a multi pin NOR gate

The 8 diodes do what i'm confused
 
Yes the pulse with is like 2% to 5 % on the HIGH state going to the RESET pin

Here is a picture of the RESET switch

View attachment 72048
No.
The capacitor C13 charges slowly causing the Reset signal to be low until the capacitor has charged a few volts. See pin 4 of U12 that is marked R with a line over it? It is called "R-not" so it is reset when it is low and the datasheet also says so.

The RC networks in your other sketches are also simple time delays.
 
Yes the reset button is a momentary switch. When it is pressed it cause the voltage to go low but then the voltage rises up to +5 volts.
why did the designer want the reset switch to have a time delay or have the voltage rise up after the reset switch has be pressed? When the rresets switch dc voltage is rising from low to high after its been pressed what is this called
 
Most circuits require a certain minimal lenght of the reset pulse to insure a correct reset, so this circuit does that using a slowly charging cap.
 
Any reason why the reset needs a time delay?

Those RC networks for the hex schmitt inverter and flip flops change the square wavefrom into shark fin triangle wave shapes?
 
An RC Integrator network charges a capacitor at a slope

The capacitor in the "active low reset switch" charges the capacitor, but it's not at a slope, it's DC level a straight dc level that rises up slowly. How are the capacitors difference?

One capacitor charges at a slope, the other capacitor charges at a straight line DC level rising up to supply voltage ( but what is this called, it's not rise time cause it's not a slope?

Rise time is for slopes and ramps

This is a DC level straight line that moves from zero voltage and slowly rises up to supply voltage, but what is this called please? it's not a rise time
 
The slow voltage charging rise or discharging fall of the capacitor of course is a slope. When it reaches the input switching voltage of the IC input it feeds then a time delay has occured.
 
The slow voltage charging rise or discharging fall of the capacitor of course is a slope

It's not a slope/ramp, its a straight Line ( DC voltage )

When you press the active low reset button, the straight line ( DC level ) goes down to zero volts straight line, when you let go of the active low reset button, the straight line ( DC level ) starts rising up still is a straight line rising up at a different voltage very slowly until it reaches + 5 volts
 
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