I was wondering if there is a type of delay circuit that only delays high signals? (5V logic)
As in if the signal went from high to low I wouldn't want a delay.
I am picturing having a forked signal with 1 part leading to a delay but both paths leading to an AND gate.
This seemed like a good approach to me but you guys have more experience.
As in if the signal went from high to low I wouldn't want a delay.
I am picturing having a forked signal with 1 part leading to a delay but both paths leading to an AND gate.
This seemed like a good approach to me but you guys have more experience.