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The AVR version has a 32bit phase accumulator.That'll take awhile.... Paging the ROM tables 4 * 255 and there will be a significant frequency drop as the humble pic cannot do register to register addition...
I want to see how fast I can get it on an enhanced pic16...
Could it be done in 12 cycles for 18F or 11 cycles for enhanced 16F devices?As I first thought.... To use the tables you need a routine to access then... Or at least a mackro.... This will slow down the table access quite a bit... Without the large table code we are up to 16 cycles....
;
; 18F
;
dds movf phase+0,W ;
addwf accum+0,F ;
movf phase+1,W ;
addwfc accum+1,F ;
movf phase+2,W ;
addwfc TBLPTRL,F ;
tblrd* ; read sine table data into TABLAT
movf TABLAT,W ; sine table data
movwf PORTB ; update R2R
bra dds ;
;
; 16F (enhanced)
;
dds movf phase+0,W ;
addwf accum+0,F ;
movf phase+1,W ;
addwfc accum+1,F ;
movf phase+2,W ;
addwfc FSR1L,F ;
movf INDF1,W ; sine table data
movwf PORTB ; update R2R
bra dds ;
Could it be done in 12 cycles for 18F or 11 cycles for enhanced 16F devices?
Code:; ; 18F ; dds movf phase+0,W ; addwf accum+0,F ; movf phase+1,W ; addwfc accum+1,F ; movf phase+2,W ; addwfc TBLPTRL,F ; tblrd* ; read sine table data into TABLAT movf TABLAT,W ; sine table data movwf PORTB ; update R2R bra dds ;
Some of the 16F17xx series devices have an 8-bit DAC (R2R type) and op-amp which would eliminate the need for an external R2R and external op-amp.Code:; ; 16F (enhanced) ; dds movf phase+0,W ; addwf accum+0,F ; movf phase+1,W ; addwfc accum+1,F ; movf phase+2,W ; addwfc FSR1L,F ; movf INDF1,W ; sine table data movwf PORTB ; update R2R bra dds ;
Cheerful regards, Mike
Does your code allow page boundry crossing?
When I try to access the complete 255 values on a pic16f1826, the program goes nuts around item 0xFA... and reboots the micro.. That means it has crossed the page boundary... I must be using idea's from the midrange picsHi Ian,
Not sure I understand your question. The 18F (16-bit core) devices don't have "pages" as such. In 16F "enhanced mid-range" (14-bit core) devices you can indirectly access data or program memory anywhere in either address space without concern for "page" boundaries when accessing program memory.
Regards...
Stupid question here..... How do you load the FSR1H.....
Never mind..... I have loaded it manually.... I see from the datasheet that when accessing Flash memory bit7 has to be set!!
;
; setup FSR1 for 'sine' table (assembler knows 'sinetbl' label is
; in program memory and will will add 0x8000 to the address).
;
movlw low(sinetbl) ; sine table address lo
movwf FSR1L ;
movlw high(sinetbl) ; sine table address hi
movwf FSR1H ; FSR0 = &sinetbl
279 ;12F1822 Serial Demo.c: 71: FSR0 = &sine[0];
280 041D 3084 movlw 132
281 041E 0020 movlb 0 ; select bank0
282 041F 0085 movwf 5 ;volatile
283 0420 3000 movlw 0
284 0421 0084 movwf 4 ;volatile
Are you sure? I thought AVR used one clock cycle per instruction cycle where PIC uses four clock cycles per instruction cycle. Isn't a 16-MHz AVR roughly equivalent to a 64-MHz PIC?With your code its as fast as the AVR..... Just the serial interface to do now... Cheers Mike...
Please show your code, Ian... I'd like to see how you did it... Are you using the built-in 5-bit DAC or an external R2R?