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PWM pulse generator

This is the base design (not a full working drawing with pin-numbering etc) for a simple PWM pulse

  1. alec_t
    This is the base design (not a full working drawing with pin-numbering etc) for a simple PWM pulse generator using logic gates in a cheap, readily-available CD4011B or CD4049B IC. The pulse duty cycle is variable from 0% to 100%.


    Circuit Operation

    Inverting gates U1b,U1c plus resistors R4,R6 form a Schmitt trigger with upper and lower threshold voltages determined by the ratio of R4:R6.
    C1 charges slowly via R1 and discharges rapidly via R5,D1 under the control of the Schmitt trigger, thus providing an oscillator with an approximately sawtooth waveform and a pulse period governed primarily by the time constant R1C1 (since R1 is much greater than R5). With the component values shown the pulse repetition frequency is ~ 20kHz.
    A DC control voltage Vcon (in the range 0 up to the supply voltage V+) and the sawtooth voltage across C1 are summed via weighting resistors R2,R3. Inverter U1a changes state when the sum voltage crosses its logic threshold (~ half of V+), thus giving an output pulse with a width determined by Vcon. The weighting resistor values shown enable a full scale (0% to 100%) adjustment of the pulse duty cycle (mark:space ratio). If a reduced adjustment range is required then R2 can be increased in value.
    Vcon can be derived from a potentiometer (in the range 10k to 100k) connected directly between V+ and ground, or from any other source.
    R5 limits the current flow through U1b when C1 discharges and its value is chosen according to V+ using the formula R=100 x V+.
    Variation of pulse width with control voltage is non-linear because of the exponential charging of C1. It can be made linear by replacing R1 with a constant-current source if necessary.