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Brushless DC Motor Speed Controller

A simple, cheap, BLDC motor controller using readily-available components is described. Most previ

  1. alec_t
    A simple, cheap, BLDC motor controller using readily-available components is described.
    Most previously-published speed controllers for BLDC motors either (1) reduce the supply voltage across the motor by a linear or asynchronous PWM control method, or (2) require access to the individual coils of the motor to vary the coil drive, and involve either dedicated ICs or microcontrollers together with optical or back-emf rotor-position sensing arrangements. Here is a simple alternative, using what I term a synchronous-pulse-delay (SPD) method, and not requiring access to the individual coils.
    Circuit operation
    Electronic commutation inside the motor ensures that its coils are energised in sequence with a current pulse. An external current-sense resistor Rsense develops a voltage (Isense) proportional to the current. Rsense is chosen such that the voltage applied to the motor is reduced by no more than an acceptable amount (e.g. 0.5V).
    With each commutation the coil current drops to near-zero. As the consequent voltage on Rsense goes below a threshold voltage (Vref) set by R1,R2 comparator U1a output goes high. C2 begins to charge via R4 and U1b output goes low, switching off Q1. Q1 stays off until C2 has charged to a point where the voltage at the inverting input of U1b falls below a speed-control voltage (Speed) set by a 100k pot. U1b output then goes high and turns on Q1 to allow coil current to flow. The resulting rise in Isense causes the output of U1a to go low and C2 discharges via D1 and R5.
    The positive-feedback loop consisting of U1a, U1b and Q1 thus forms a monostable circuit triggered in synchronism with the commutation and with a period settable by the Speed voltage. Each coil-drive pulse is effectively delayed by the monostable period: the longer the delay the lower the average current drawn by the motor, the lower the average voltage across the motor, and the lower the speed of the motor. Although average current is lower the instantaneous current is not (it increases slightly as speed drops but varies surprisingly little over an 8:1 speed change); so there is good torque at low speeds.
    The components shown are suitable for control of 2-wire motors up to ~0.15A running current, e.g. typical box fan motors.
    The output of U1a also provides a convenient point to take off a signal to a speedometer, or to feed a missing-pulse detector for sensing a locked-rotor fault.
    D4 is a Shottky spike-suppression diode rated to carry the peak current drawn by the motor. C4 provides a path for freewheeling currents when Q1 is non-conducting; its value should be increased in line with motor size and it should have a low ESR.
    Here are plots showing motor current and the output pulse from U1a, at maximum, intermediate and minimum motor speeds:-
    Instead of using a bipolar junction transistor to drive the motor an N-channel MOSFET may be used :-
    A 12V controller supply is recommended if a MOSFET drive is used; otherwise a 9-12V supply.
    The Speed voltage can be provided by a logic circuit or by a mechanically-switched source. It could also be a PWM signal fed via a ~33k resistor. Another option would be an input circuit having a thermistor or a light-dependent resistor.
    A switched dual-pot circuit as below could be used to pre-set a maximum speed and a minimum speed :-
    Input_(dual pot).gif
    R2 should be selected so that Vref is about half the Isense voltage when the motor is at full speed.
    C2 may need to be increased if very low speeds are required.
    Although no switching voltage spikes going more than a couple of volts above the positive rail were seen with the small motors tested, a reverse-biased fast (e.g. Schottky) diode, rated at the maximum motor current, connected across the motor is advisable for protection of Q1/M1.
    For very high-revving motors a faster op-amp than the LM324 may be necessary; but it should be one having rail-to-rail input and output capability.
    (Revised 17 Jan 2013)