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Could you explain more about the bold part? How can we know that the transistor is full on as VDG is maximum?Look at the schemo again: you have the gate and drain at the same voltage, therefore turning it full on. That causes Vds to drop to its lowest voltage: Vth.
Then solve for Vds and you get Vds=Vth + sqrt(Id/k)
So, really the actual voltage depends on the drain current, but the variation is small for reasonable currents. This is similar to a bipolar diode where we say the voltage drop is 0.7 V (assuming it's silicon). Really the actual voltage drop on a diode (whether bipolar or FET based) depends on current.
Id here is still unknown, how can we know that sqrt(Id/k) is very small and can be ignored?
Thank you.
Miles Prower:
Could you explain more about the bold part? How can we know that the transistor is full on as VDG is maximum?
SteveB: