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voltage measurement circuit for 240V

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davecon

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hi!

I would like to design a voltage measurement circuit.
What i can understand for now is that i can use the voltage detector IC,BD4850G to measure the voltage which is about 5 V

I'm designing a board to measure the voltage of the electrical appliances plugged to an electrical socket. Then, by measuring the voltage of the electrical appliance, the reading of the voltage will then to be store into the MCU, PIC18F4620.

However now i want to design a voltage measurement circuit to measure 240V.
I have no idea what components should i use.

Can anyone suggest any idea where should i go next?
 
hi!

I would like to design a voltage measurement circuit.
What i can understand for now is that i can use the voltage detector IC,BD4850G to measure the voltage which is about 5 V

I'm designing a board to measure the voltage of the electrical appliances plugged to an electrical socket. Then, by measuring the voltage of the electrical appliance, the reading of the voltage will then to be store into the MCU, PIC18F4620.

However now i want to design a voltage measurement circuit to measure 240V.
I have no idea what components should i use.

Can anyone suggest any idea where should i go next?

you need to scale and shift the voltage, with an op-amp, to be withing 0to5 volts then use a microchip with an analog to digital controller to read then display the voltage
 
You can read the voltage with the pic and a voltage divider like this
 

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You can read the voltage with the pic and a voltage divider like this

no you cant, that will give over 5 volts to the pic, 240v ac is what like 330~340v peak? you also don't need such high values

you would be better using an op-amp in front of the a/d, to... like i said, scale and shift the signal to fit the pics requirement of 0 to 5v(or 0 to 3.3v)
 
no you cant, that will give over 5 volts to the pic, 240v ac is what like 330~340v peak? you also don't need such high values

you would be better using an op-amp in front of the a/d, to... like i said, scale and shift the signal to fit the pics requirement of 0 to 5v(or 0 to 3.3v)

Yes you can I don't no what boat you fell off but I been doing this kind of thing
for over 20 years.

You need to read the appnotes before you app your mouth.

Oh using the high value resistors let the EMF diodes in the pic to clamp at vdd it will not go higher only lower But what do I Know LOL
 
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Yes you can I don't no what boat you fell off but I been doing this kind of thing
for over 20 years.

You need to read the appnotes before you app your mouth.

Oh using the high value resistors let the EMF diodes in the pic to clamp at vdd it will not go higher only lower But what do I Know LOL

lol you have done this for 20 years and are this clueless!?

240V RMS will be 339peak your 50:1 voltage devider will give +/-6.8volts thats 1.5volts above the Absolute Maximum of a pic and -6.5 bellow the Absolute Maximum!! FFS so what the pic "CAN" clamp that if you keep the input impedance 50,000 times greater than the datasheet says it should be!!(WOW)

so tell me your greatness, how does the analog to digital measure voltage that is being clamped because it is over the Absolute Maximum???
 
Easy it can read from 0 to 5 so you can read from 0 to 240 not above 240 but to 240 any voltage above VDD will clamp at VDD. Like I said read the appnotes not the datasheet they show how to do things like this.

If the OP needs to take higher reading he can just change the divider values
Any way instead of telling me how you think I'm wrong why don't you show him how you would do it.

I didn't ask for help the OP did.
 
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Any way instead of telling me how you think I'm wrong why don't you show him how you would do it.

I didn't ask for help the OP did.

I did when i wrote this

you need to scale and shift the voltage, with an op-amp, to be withing 0to5 volts then use a microchip with an analog to digital controller to read then display the voltage
 
Ignoring the fact that the 240VAC side should most likely need to be isolated from the low voltage 5V PIC supply. Ignoring the fact that the OP probably really wants to measure current:
You could get away with a simple voltage divider method like this if you measured the peak-to-peak voltage in software:
 

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Ignoring the fact that the 240VAC side should most likely need to be isolated from the low voltage 5V PIC supply. Ignoring the fact that the OP probably really wants to measure current:
You could get away with a simple voltage divider method like this if you measured the peak-to-peak voltage in software:

That will work too
 
Ignoring the fact that the 240VAC side should most likely need to be isolated from the low voltage 5V PIC supply. Ignoring the fact that the OP probably really wants to measure current:
You could get away with a simple voltage divider method like this if you measured the peak-to-peak voltage in software:


this is much better, still to much impedance
 
Correct. The resistance values should be half the values shown to give a max 2.5K source impedance.
Somehow my brain thought 5K was the minimum source impedance for PIC ADC. Doh!
 
It's 10K for 16fxxx chips and 2.5k for 18fxxx chips It don't matter as much as you think for what the op wants to do.
 
It's 2.5K for 16 series chips, at least all the ones I've used.

Where this come from ? This is from 16fxxx datasheet
And the key word there is recommended impedance
That means if you want the best read time then use this or less
But it don't tell you that what I posted will not work.
when the volts go up impedance is less important.


For the ADC to meet its specified accuracy, the charge
holding capacitor (CHOLD) must be allowed to fully
charge to the input channel voltage level. The Analog
Input model is shown in Figure 9-4. The source
impedance (RS) and the internal sampling switch (RSS)
impedance directly affect the time required to charge the
capacitor CHOLD. The sampling switch (RSS) impedance
varies over the device voltage (VDD), see Figure 9-4.
The maximum recommended impedance for analog
sources is 10 kΩ.
As the source impedance is
decreased, the acquisition time may be decreased.
After the analog input channel is selected (or changed),
an A/D acquisition must be done before the conversion
can be started. To calculate the minimum acquisition
time, Equation 9-1 may be used. This equation
assumes that 1/2 LSb error is used (1024 steps for the
ADC). The 1/2 LSb error is the maximum error allowed
for the ADC to meet its specified resolution.

This is for the 18fXXX chips
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (CHOLD) must be allowed
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 17-2. The
source impedance (RS) and the internal sampling
switch (RSS) impedance directly affect the time
required to charge the capacitor CHOLD. The sampling
switch (RSS) impedance varies over the device voltage
(VDD). The source impedance affects the offset voltage
at the analog input (due to pin leakage current). The
maximum recommended impedance for analog
sources is 2.5 kΩ.
After the analog input channel is
selected (changed), the channel must be sampled for
at least the minimum acquisition time before starting a
conversion.
To calculate the minimum acquisition time,
Equation 17-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
 
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16F818/819 - looks like it's different for different 16 series devices?.

The maximum recommended impedance
for analog sources is 2.5 kΩ. As the impedance
is decreased, the acquisition time may be decreased.

In any case, if you aim for 2.5K you're satisfying all options.
 
2.5k, 10k, its all much less than tens of megaohms, thats why i suggest using an op amp then you can have extremly high input impedance for the signal, but very low impedance at the A/D input

at these frequencies an op-amp can be set up as an attenuator(Rf < Ri) and the other input used to shift the AC curcuit up 2.5volts so it is between 0v and 5v
 
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