Uni Project FM TRnasmitter

[mneary]

So everyone except marc and myself have forgotten how JFET (and grid leak) amplifiers/oscillators generate their self-bias? The JFET gate is at the maximum AC voltage node and will rectify whatever drive it sees.

What troubles me is that NXP lists the BB201 as a double diode and only one is accounted for. Maybe they're in parallel.

The audio stage needs pre-emphasis or it will sound muddy.

 

[mneary]

thnkx but how i define audio buffer,RF oscillator and an RF amplifier???

And wea frm i kan begin ma calc???

You can begin by familiarizing yourself with your keyboard and taking the care to use whole words.

 

[Hero999]

So everyone except marc and myself have forgotten how JFET (and grid leak) amplifiers/oscillators generate their self-bias? The JFET gate is at the maximum AC voltage node and will rectify whatever drive it sees.

Sorry, I don't understand.

The JugFET gate is reverse biased, there'll be a tiny leakage current which will be eaten up by R6.

I've never encountered such a circuit before.

 

[marcbarker]

I've never encountered such a circuit before.

Really? You'd seemed so sure about how it worked!

 

[Hero999]

As you're so sure why not enlighten me?

 

[marcbarker]

As you're so sure why not enlighten me?

Since I was outnumbered by a majority, I decided to leave it open

 

[Hero999]

That's only because you don't really know the answer.

 

[mneary]

Not all of the reverse bias on Q1's gate is generated by R10. R6 is a very high value. Detected AC at Q1's gate controls the transconductance and sets the oscillation amplitude.

 

[marcbarker]

Not all of the reverse bias on Q1's gate is generated by R10. R6 is a very high value. Detected AC at Q1's gate controls the transconductance and sets the oscillation amplitude.

Yes, and it's typically around -5 V. Adequate bias for any varicap.

 

[audioguru]

The FET is a Junction FET that is a depletion type. It conducts when its gate-source voltage is low. A negative voltage on the gate or a positive voltage on the source cuts it off.

The gate where there is a vari-cap diode is at 0VDC and the source has current in the source resistor R10 so the source voltage rises enough to reduce the current a little.

I think the circuit is wrong and vari-cap diode is supposed to have a regulated DC reverse bias. The DC level can be set with a pot to control the RF frequency.

 

[marcbarker]

gate where there is a vari-cap diode is at 0VDC
<..>
I think the circuit is wrong.

Is that what happened when you breadboarded it?

 

[mneary]

Although in the 60's and prior this was the 'only' way to bias an oscillator, I guess newcomers shouldn't feel too bad.

There's a pretty good explanation in my 1954 ARRL handbook (using tubes). Since JFETs had just been invented (Shockley, 1952) there was no experience to write.

My 1977 ARRL shows the identical self-bias method on the MPF102, 2N5486, etc. in a lot of oscillators, but I didn't find any supporting text, which is why no newcomers know how to bias anything.

My 2005 and 2008 ARRL and my 9th edition RGSB handbooks treat biasing very lightly. What a surprise waiting when the student simulates!

 

[Nigel Goodwin]

Although in the 60's and prior this was the 'only' way to bias an oscillator, I guess newcomers shouldn't feel too bad.

Actually, cathode bias was a fairly late innovation, the conventional method was to provide an external negative feed for the grid - a method still used today in many high power guitar amplifers (where you don't want to waste a lot of the power in a cathode resistor).

However, this doesn't have anything to do with the thread - the grid (gate) is kept at zero volts, and the cathode (source) is made positive by the current through the valve (FET). Doesn't matter if it's an oscillator or not, the grid (gate) is at zero volts, and only 'negative' with respect to the cathode (source).

 

[marcbarker]

the grid (gate) is kept at zero volts, <..> the grid (gate) is at zero volts, and only 'negative' with respect to the cathode (source).

Don't forget it's an RF circuit. Part of reason there's -5V (approx.) on the gate.

 

[mneary]

This isn't cathode (source) bias, it's the JFET equivalent of grid leak bias. The source resistor should be small or the oscillator will either be unreliable starting or noisy due to excess gain. Some circuit examples show no source resistor, but they overheat if the oscillator fails to start.

In one of the tube circuit explanations, they warn if the oscillator fails to start, the static plate current will burn it up.

 

[marcbarker]

This isn't [predominantly] cathode (source) bias, it's the JFET equivalent of grid leak bias.

Yes, and the jfet is operating in class c. Common in RF circuits.

 

[Nigel Goodwin]

Yes, and the jfet is operating in class c. Common in RF circuits.

Not in oscillators, which wouldn't work - and the amount of bias, or whatever class it might be in, depends entirely on the component values - which we don't know.

 

[marcbarker]

[class c is] Not in oscillators, which wouldn't work

All 'oscillators' tarred with same brush now?

Don't forget some oscillators are RF circuits, and many operate in class C. Class C is common in RF circuits

"they warn if the oscillator fails to start, the static plate current will burn it up." = class c
"they overheat if the oscillator fails to start"
= class c

oh & another thing, RF circuits are strongly influenced by the overall Q, not dictated "entirely by [theorectical] component values" as often interpreted. A coil may be described as "100 uH", but sometimes the Q is not mentioned in the description.

 

[mneary]

not necessarily class C, but at least grid leak biased....

I've simulated using the values I most commonly see in ham circuits (not scientific of course). But then many of my citations don't have any bias generation in the source.

Nigel is correct, we don't know what values the original designer used. I've done some simulations and it appears that class A and C both work well.

 

[marcbarker]

**broken link removed**

RF output voltage of this class c oscillator is 5 V PK-PK (otherwise it wouldn't be worth the trouble)

Notice the value of Rs. Notice the fet is source-follower. Id(ave) = 0.6 mA

Notice the 1 mH. It has 5 V pkpk RF across it.

Now think about what might the gate negative DC voltage be, for this 5 V pk-pk?

And for a bonus point: what class this osc operates in