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Yeah nice. He must just need to keep in mind the level shifter will need both voltages to power it, 13V power and 3V3 power for example.If you need more than one input you could use a level shifter board.
The AVR data sheet is very specific. The relevant section is below. You are not allowed to inject any current into a port pin configured as an input, and you must clamp the voltage at no more than 0.5V more positive than Vdd and no more negative than 0.5V below Vss, which would mean that the input swing is constrained from -0.5V to +5.5V if the Atmel is operated from 5.0V.
Sorry, but that sounds utter nonsense Mike - the AVR was essentially a 'rip-off' of the PIC, which is perfectly happy using a single current limiting resistor and the internal protection diodes (with MANY official application notes showing their use in that way).
You even showed an AVR diagram displaying similar protection diodes, why would you think they are fitted if they aren't of any use?.
But in any case, the two resistor attenuator suggestion I made would easily meet the supposed 'requirements', and at considerably less cost than one resistor and two Schottky diodes
Did you read the data sheet? Did you search ATMEL's web site for applications notes about latch-up? I did. The only reference I could find on ATMEL's site was a caution not to exceed the voltage limits I cited to prevent latch-up. This was in the context of using the SPI where the signal lines are essentially transmission lines, and ATMEL is worried about overshoot/ringing inducing latch-up.
The input protection diodes are there for ESD static protection. Just because a CMOS chip will stand the normal ESD discharge test, that does not guarantee that the circuit will not latch up if it is powered and current is injected into the inputs; two different things!.
If you know apriori that an input signal voltage is limited to say, 0-10V, then sure, you can design a resistive divider that will constrain the pin voltage to keep it within the allowable limits.
sorry it is 1megaΩ, thanks for the calculation. So that means i can use a 35-40K and get away with it . But i admit voltage divider is a proper way of doing it.I think you mean 1megΩ, not 1mΩ. A resistor that high does not meet the leakage spec on the input pin if the input is swinging from 0V to 12V. With input at 0V, the worst case leakage out of the pin could bias pin to a logic one.
The ATMEL appnote says (on page 4) : The series input resistor is a 1 MΩ resistor. It is not recommended that the clamping
diodes are conducting more than maximum 1 mA and 1 MΩ will then allow a maximum
voltage of approximately 1,000V.
Turning that around, to keep the injected current to less than 1mA, say 200uA, with a 12V input, the resistor should be no less than ~ (12-5)V/0.2mA = 35K.
It is still interesting to me that ATMEL advocates violating an Absolute Max Rating right on their own data sheet.
It's interesting because there are Microchip Application notes that show designs using the ESD diodes for clamping. The second TB3009 I linked to states in two places that 'passing current through the ESD diodes is outside operating conditions', but doesn't say it shouldn't be done - like saying 'do it at your own risk'.Pete, this supports what I have been saying. I worked in the CMOS IC design field in the 80s and 90s, and latchUp was always a huge problem. Seeing circuits that purposely drive CMOS pins above Vdd and below Vss have always make me nervous...