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TTL Question

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wuchy143

Member
Hello All,

Does anyone know when a TTL signal goes above a certain amount when is it considered a logical "1". Or at what voltage is it considered a logical "1". There must be some hysteresis in TTL sigs? Also, when is it considered a logical "0"?

thanks!

-mike
 

Papabravo

Well-Known Member
One other caveat is to always check the datasheet, especially when using parts that bear a superficail similarity to TTL part numbers.
 

Dean Huster

Well-Known Member
It's interesting to note about TTL logic levels is that the range for a logical LOW, normally specified as being from 0v to +0.7v, is much narrower than that for a logical HIGH, normally specified as being from +2.0v to +5.0v (Vcc). Be forewarned that most of the TTL chips I've seen don't really consider a logical LOW to be very good and dependable unless it's about 0.2v or less. For that reason, using pull-down resistors is very difficult as the input current to pull an input down to a LOW is a lot higher than the current required to pull it to a HIGH. This extra current means that your pull-down resistor has to be less than 100 ohms, sometimes more like 10 ohms to insure a good LOW while 1K ohms is fine if you're pulling up.

A lot of circuit problems can be traced to (1) LOWs not being low enough; (2) floating (i.e., unconnected) inputs such as presets, clears, parallel loads, etc. on clocked logic; (3) poor power supply decoupling, especially when using clocked logic. It's suggested that you have one 0.1µF disc ceramic capacitor in parallel with the supply pins of EACH chip in your design, mounted as close to the Vcc pin and ground plane as you can get.

Dean
 
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