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5.5 Timer1 Oscillator
A crystal oscillator circuit is built-in between pins OSC1
(input) and OSC2 (amplifier output). It is enabled by
setting control bit T1OSCEN (T1CON<3>). The
oscillator is a low power oscillator rated up to 37 kHz. It
will continue to run during SLEEP. It is primarily
intended for a 32 kHz crystal. Table 9-2 shows the
capacitor selection for the Timer1 oscillator.
The Timer1 oscillator is shared with the system LP
oscillator. Thus, Timer1 can use this mode only when
the system clock is derived from the internal oscillator.
As with the system LP oscillator, the user must provide
a software time delay to ensure proper oscillator
start-up.
While enabled, TRISIO4 and TRISIO5 are set. GP4
and GP5 read ‘0’ and TRISIO4 and TRISIO5 are read
‘1’.
RTCinit banksel TMR1H
movlw 0x80 ; Preload TMR1 register pair
movwf TMR1H ; for 1 second overflow
clrf TMR1L
movlw b’00001111’ ; Configure for external clock,
movwf T1CON ; Asynchronous operation, external oscillator
clrf secs ; Initialize timekeeping registers
clrf mins
movlw .12
movwf hours
banksel PIE1
bsf PIE1,TMR1IE ; Enable Timer1 interrupt
return
RTCisr banksel TMR1H
bsf TMR1H,7 ; Preload for 1 sec overflow
bcf PIR1,TMR1IF ; Clear interrupt flag
incf secs,F ; Increment seconds
movf secs, w
sublw .60
btfss STATUS,Z ; 60 seconds elapsed?
return ; No, done
clrf seconds ; Clear seconds
incf mins,f ; Increment minutes
movf mins, w
sublw .60
btfss STATUS,Z ; 60 seconds elapsed?
return ; No, done
clrf mins ; Clear minutes
incf hours,f ; Increment hours
movf hours, w
sublw .24
btfss STATUS,Z ; 24 hours elapsed?
return ; No, done
clrf hours ; Clear hours
return ;