tennis score board

[Harry Potter]

I am building an up / down counter with a 7 segment led display, and would like outputs from 0 to 9. I am using 12 power supply and a cd40110b chip. I am not having any success getting this chip to count. I am connecting the up terminal 9 to ground through a 100k resistor & the same with down terminal 7. Applying +12 to pin 7 or 9 does nothing. Any help is great

 

[Tony Stewart]

Check all inputs against Truth Table

If it fails these rules of Logic, and Voltages are correct, then the chip is probably blown from ESD .

Take care.

 

[Harry Potter]

Tony
Thanks for the info. I must have a bad chip. By the way, what is ESD?
Harry

 

[Tony Stewart]

Chips go bad by User lack of awareness of ESD rules
Often the rise time of the Zap is 100 ps faster than the ns response of the chip protection.

Keep finger on grounds to discharge before touching open pins . is one method.
**broken link removed**

 

[dr pepper]

ESD electro static discharge.

Remember rubbing your feet on the carpet at school then touching someone and giving them a shock, same principle, only cmos devices stay dead, I dont think I've ever had one fail like this.

 

[Tony Stewart]

I used to kill TTL with ESD in the late '70's before I understood it and these were Hi-Rel parts with Mil-Std-883 screening.
CMOS tends to get wounded if not dead which under the forensic of an SEM ( scanning. e microscope.) might look like a volcanic crater in a semiconductor dielectric and then fails when you least expect it. ( infant mortality) But CMOS inputs are protected now, but not the outputs.. unless specified.

I remember in we had a bleeding-edge technology in the early 80's with T1 to a 100 homes ISDN BB-WAN/Pay TV/ Alarm sensing/Tele-shopping
In the winter every time someone someone in the "demo" home touched the TV, the hi-speed serial port to the keyboard plugged into a phone jack to the unit in the basement would "latch-up" in the basement.. Hmm what's that smell. Seems a little hot this chip. As we know now, CMOS has a vertical structure exactly like than of 2 transistor SCR's or -pn-pn junctions and if the input or output exceeds the supply rail by some amount, the chip shorts the supply rails across this junction and conducts according to its material property ESR and gets hot or now-a-days smokes the junction with sufficient supply rails.

It only resets when current drops below the holding current of an SCR.
So a DC power cycle restores normal operation to a latchup effect unless damaged by current density of Joules dumped in 10ns or so.

Since then all CMOS has internal Schottky diodes for each input to both supply rails to clamp this nasty spike. It usually works unless you use a key or conductor to give an ionization rise time faster than the diode can respond.
ESD can have a rise time observed in pico seconds in air with a short gap.

The best generation of static voltage I have managed to do was wearing Neoprene soled shoes over an untreated Nylon carpet in Las Vegas hotel room in the 80's with almost a 3" arc from a sharp tip key to the door knob, which is equivalent to around 70kV in dry weather or 1kV/mm.

So ESD protection is pretty good these days and is designed to handle the "human" finger model, but not necessarily a "cart" or even the charge built up on old TV glass screens.

We learnt to exchange motherboards or daughter boards or any circuit board between people by touching fingers first to discharge then transfer the card by fingers on the ground pads. It was like some ritual handshake.

You dont even have to feel ESD for it to damage CMOS or even LED's for that matter which are only rated for -5V. Which is why my LED's are all zener protected from the factory for my clients..