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renyee

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Hi, i'm designing a

However, i faced problems during reset part.

My hours seven segment display cant stop at 2400 then reset to 0000.

I wonder how can i reset it.

Im new please help me.

Thanks..
 
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You need to post a higher resolution diagram. The text is not readable. The count decode for the hours reset looks to be the same as the seconds and minutes. I suspect it will reset after displaying 59 hours. Is that what it does ? You need to decode a count of 24 for the hours reset.

Les.
 
ya it stop at 59 just like min and sec....im trying to modify through min and sec that why got the same logic gate
 
When I first looked at your schematic I thought that U6 and U8 were the seconds counter as the clock signal goes into U8 so I assumed that U19 and U11 were the hours counter but I later realised that U6 and U8 do not have any decoding for the reset . I don't understand how the seconds counter is counting to 60. With no reset decoding I would expect it to count to 256. As you have not given any IC part numbers I don't know how yor 7 segment decoders will display A to F. You also do not have any signals clocking the up inputs of U10 and U11. so I cannot see how these counters can work.

Les.
 
Very sorry is my bad, what i shown just now is what i used to test only hours because i dont wan to wait till really 24 hours therefore i direct connect the u8 with function generator.... now i shown the IC number....hours is u6 and u8 which i still cant figure out how to reset therefore is empty. Im very sorry im new in this field so many things got it wrong, hope sir can help me, Thanks**broken link removed**
 
For the reset on U8 (Hours units) there are two conditions when you need to reset it. First it needs to reset when the count = 10 (Decimal) but it also needs reseting when it reaches 4 AND U6 (Tens of hours) reaches 2 The decode of 10 fro U8 ia also used to increment U6 You can use the same logic as used in the seconds and minutes to decode the countof 10. You could also do it from a logical AND of Qb and Qd. (You do not need to also check that Qa and Qc are low as this is the first time in the count that Qb and Qd are high.) For the other reset condition all you need to do is a logical AND of U8 Qc (Count of 4) and U6 Qb (count of 2) This will directly reset Q6 and will be ORed with the decode of 10 for U8 to reset U8

Les.
 
Thank you, sir for your advice....i not so understand your meaning but i will try my best to do it and see whether i can successful or not after morning....
Thank you very much.
 
Here is the reset circuit implemented using NAND gates.
24reset.jpg


You may have to add capacitors between the reset pins and ground to stretch the reset pulses. (If they are needed I would start with about 100 pF capacitors.)

Les.
 
Still can't sir....is it my circuit connected wrongly? Because at the hour segment 08, 09, 18 and 19 didnt show, it direct jump to 10 and 20 after reach 7 and 17..Please help me thank you...**broken link removed**
 
Your schematic looks correct. Check your wiring between U8 Qb and the input of the nand gate. Either the nand gate is seeing Qb high all of the time or it is a timing problem when the count goes from 0111 (7 decimal) to 1000 8 decimal) It could be seeing bit Qb still high when it changes from 1 to zero as Qd just changes to a high. You would need a very fast oscilloscope to be able to see this very fast pulse if that is the problem. I will have a look to see is I have a SN74193 in my stock of old 74 series ICs Can you confirm that you are using the old 74 series rather than 74HC or 74 LS as I would need to use the same components as you are using. You could try adding a small delay to the Qd input of the NAND gate with a series resistor (about 100R) and a 100 pF capacitor directly from the gate input and ground. Another possible solution would to do a full decode of state 10 (1010) by doing an AND of Qb, Qd, NOT Qa and NOT Qc.

Les.
 
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I will try using your method, im not sure with the series yet because our lecturer havent gave us the components yet so im cant give a confirm answer, only want our multisim schematic. I try it and see how it goes. Thank you
 
I thought that you were building this clock. I did not realise it is a test of some kind. The fact that you have a race hazard problem will be a good learning exercise. I have never used simulators. You may be able to look at the output of the nand gate on the simulator if you can configure a 3 channel oscilloscope to look at Qb, Qd and the nand gate output. When you designed the decoding for the seconds and minutes counters did you take into account propagation delays ? I thought you got the design from an old magazine or off the internet.
As you are on some kind of electronics course you should have been able to work out the required gating around the hours counter yourself.
Les.
 
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I'm sorry, sir if I make you felt like you helping me cheating...actually is just like a homework...I wasn't intended to take for granted of you, sir. Sorry, I also want to learn new stuff I'm freshly new in this field. I will try hard to solve myself next time, thank you for your advice. Thank You very much:)
 
Solved, thank you very much sir......very very thank you....the nand gate need to use 7400N then everything will be solved....thank you sir
 
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