The apparent distortion is caused by having too few samples per cycle in your simulation. Make the minimum sample time 10usec, and then try larger values and watch the changes.
Your second circuit needs a 10uF cap in series with R7. Otherwise, the DC bias at the input (7.5V) gets amplified by 16, saturating the amp at the positive rail.
The slew rate of a 3V p-p, 20kHz sine wave is only 190mV/usec (1.9*10^5). Most op amps have no problem with this.
A 12V p-p sine wave at 20kHz will slew at about 750mV/usec.