Electrix
Member
Ok..here's a theory question to which I found no convincing answer.. I would appreciate your thoughts on this:
What are:
1. Compiled Simulators
2. Distributed Simulators
3. Mixed Simulators
Here's some info I would on Complied Simulators..the other two are still UFOs:
There are two primary steps for compiled simulators—design compilation and design simulation. During the first step—compilation—the design description code, written in a language such as Verilog, is read by the simulator and converted directly into “executable” code, which can be natively understood by the workstation. This step is similar to compiling the “C” code written by a software engineer, producing a program that can be run on a personal computer (PC). In order to perform the second step, the user must “execute” the code—similar to starting a PC application with a double-click of a mouse. With compiled simulators, the simulation step is usually run several hundred times more often than compilation. This usage ratio of compilation-to-simulation is key to implementing capacity improvements, which will minimally impact hardware resource requirements.
What are:
1. Compiled Simulators
2. Distributed Simulators
3. Mixed Simulators
Here's some info I would on Complied Simulators..the other two are still UFOs:
There are two primary steps for compiled simulators—design compilation and design simulation. During the first step—compilation—the design description code, written in a language such as Verilog, is read by the simulator and converted directly into “executable” code, which can be natively understood by the workstation. This step is similar to compiling the “C” code written by a software engineer, producing a program that can be run on a personal computer (PC). In order to perform the second step, the user must “execute” the code—similar to starting a PC application with a double-click of a mouse. With compiled simulators, the simulation step is usually run several hundred times more often than compilation. This usage ratio of compilation-to-simulation is key to implementing capacity improvements, which will minimally impact hardware resource requirements.