The capacitors should ideally be low or zero temperature coefficient types, to minimise frequency drift with temperature changes.
If the designer used ceramic "NP0" (zero coefficient) caps, they are easier to obtain in lower values.
(The highest value NP0 I have in my collection is 100pF, thought that does not mean higher values are unobtainable).
I'd use a 0.1uF ceramic for C9; C8 depends on what the output load is - ideally another buffer stage, or something that has a low and unchanging load, as variations will affect the osc frequency.
C7 is not particularly critical, something from 100pF to 1nF or more should work it's only DC isolation.