programmable array logic- help please

[big_lebowski]

can anyone help with a programmable array logic diagram. there are 6 inputs, A notA, B notB, C notC. these are inputting 4 AND gates, 4 outputs from these are inputting an OR gate. decoding logic is to be used to generate a logic 1 when counter output indicates the number 2 or 3. I have to complete diagram to implement the required decoding logic.

 

[Papabravo]

So write a boolean expression which decodes the counter outputs. The boolean expression can then be directly implemented on the diagram.

 

[big_lebowski]

The boolean expression would be notA.B.notC + notA.B.C so if i implement this into the 4 and gates can the boolean expression be repeated? therefore cancelling out and leaving with the original expression as each and gate has to have an input.

 

[Papabravo]

Each of the AND gates has enough inputs to do a complete product term epression.

AND GATE #1 ->  A'BC'
AND GATE #2 ->  A'BC

The output of those two AND gates goes to an OR gate and you have your sum of products expression.

 

[big_lebowski]

messed the last post up there sorry.i meant A'BC' and A'BC but there are 4 and gates going to the or gate. so does each and gate need an input?

 

[Papabravo]

No. the PAL programming logic knows that unused AND gates output a zero to the input of the or gate. They have noeffect on the output of the OR gate.

 

[big_lebowski]

Thanks for your help, the notes we have are quite ambigiuous. There is a section that states that 2 of the and gates could have the same function and cancel out.

 

[kamdy]

What PAL device you are using ??.I think it better to write a VHDL program for your problem