;************************************************* *********************
; This file is a basic code template for object module code *
; generation on the PIC12F675. This file contains the *
; basic code building blocks to build upon. As a project minimum *
; the 12F675.lkr file will also be required for this file to *
; correctly build. The .lkr files are located in the MPLAB *
; directory. *
; *
; If interrupts are not used all code presented between the *
; code section "INT_VECTOR and code section "MAIN" can be removed. *
; In addition the variable assignments for 'w_temp' and *
; 'status_temp' can be removed. *
; *
; Refer to the MPASM User's Guide for additional information on *
; features of the assembler and linker (Document DS33014). *
; *
; Refer to the respective PIC data sheet for additional *
; information on the instruction set. *
; *
;************************************************* *********************
; *
; File name:
; Date: *
; File Version: *
; *
; Author: *
; Company: *
; *
; *
;************************************************* *********************
; *
; Files required: *
; 12F675.lkr *
; *
; *
;************************************************* *********************
; *
; Notes: *
; *
; *
; *
; *
;************************************************* *********************
list p=12f675 ; list directive to define processor
#include <p12f675.inc> ; processor specific variable definitions
errorlevel -302 ; suppress message 302 from list file
COUNT EQU 20H
__CONFIG _CP_OFF & _CPD_OFF & _BODEN_OFF & _MCLRE_ON & _WDT_OFF & _PWRTE_ON & _INTRC_OSC_NOCLKOUT
; '__CONFIG' directive is used to embed configuration word within .asm file.
; The lables following the directive are located in the respective .inc file.
; See data sheet for additional information on configuration word settings.
;================================================= =========================
;
; Register Definitions
;================================================= =========================
W EQU H'0000'
F EQU H'0001'
;----- Register Files------------------------------------------------------
INDF EQU H'0000'
TMR0 EQU H'0001'
PCL EQU H'0002'
STATUS EQU H'0003'
FSR EQU H'0004'
GPIO EQU H'0005'
PCLATH EQU H'000A'
INTCON EQU H'000B'
PIR1 EQU H'000C'
TMR1L EQU H'000E'
TMR1H EQU H'000F'
T1CON EQU H'0010'
CMCON EQU H'0019'
ADRESH EQU H'001E'
ADCON0 EQU H'001F'
OPTION_REG EQU H'0081'
TRISIO EQU H'0085'
PIE1 EQU H'008C'
PCON EQU H'008E'
OSCCAL EQU H'0090'
WPU EQU H'0095'
IOC EQU H'0096'
IOCB EQU H'0096'
VRCON EQU H'0099'
EEDATA EQU H'009A'
EEDAT EQU H'009A'
EEADR EQU H'009B'
EECON1 EQU H'009C'
EECON2 EQU H'009D'
ADRESL EQU H'009E'
ANSEL EQU H'009F'
;----- STATUS Bits --------------------------------------------------------
IRP EQU H'0007'
RP1 EQU H'0006'
RP0 EQU H'0005'
NOT_TO EQU H'0004'
NOT_PD EQU H'0003'
Z EQU H'0002'
DC EQU H'0001'
C EQU H'0000'
;----- GPIO Bits --------------------------------------------------------
GP5 EQU H'0005'
GPIO5 EQU H'0005'
GP4 EQU H'0004'
GPIO4 EQU H'0004'
GP3 EQU H'0003'
GPIO3 EQU H'0003'
GP2 EQU H'0002'
GPIO2 EQU H'0002'
GP1 EQU H'0001'
GPIO1 EQU H'0001'
GP0 EQU H'0000'
GPIO0 EQU H'0000'
;----- INTCON Bits --------------------------------------------------------
GIE EQU H'0007'
PEIE EQU H'0006'
T0IE EQU H'0005'
INTE EQU H'0004'
GPIE EQU H'0003'
T0IF EQU H'0002'
INTF EQU H'0001'
GPIF EQU H'0000'
;----- PIR1 Bits ----------------------------------------------------------
EEIF EQU H'0007'
ADIF EQU H'0006'
CMIF EQU H'0003'
T1IF EQU H'0000'
TMR1IF EQU H'0000'
;----- T1CON Bits ---------------------------------------------------------
TMR1GE EQU H'0006'
T1CKPS1 EQU H'0005'
T1CKPS0 EQU H'0004'
T1OSCEN EQU H'0003'
NOT_T1SYNC EQU H'0002'
TMR1CS EQU H'0001'
TMR1ON EQU H'0000'
;----- COMCON Bits --------------------------------------------------------
COUT EQU H'0006'
CINV EQU H'0004'
CIS EQU H'0003'
CM2 EQU H'0002'
CM1 EQU H'0001'
CM0 EQU H'0000'
;----- ADCON0 Bits --------------------------------------------------------
ADFM EQU H'0007'
VCFG EQU H'0006'
CHS1 EQU H'0003'
CHS0 EQU H'0002'
GO EQU H'0001'
NOT_DONE EQU H'0001'
GO_DONE EQU H'0001'
ADON EQU H'0000'
;----- OPTION Bits --------------------------------------------------------
NOT_GPPU EQU H'0007'
INTEDG EQU H'0006'
T0CS EQU H'0005'
T0SE EQU H'0004'
PSA EQU H'0003'
PS2 EQU H'0002'
PS1 EQU H'0001'
PS0 EQU H'0000'
;----- PIE1 Bits ----------------------------------------------------------
EEIE EQU H'0007'
ADIE EQU H'0006'
CMIE EQU H'0003'
T1IE EQU H'0000'
TMR1IE EQU H'0000'
;----- PCON Bits ----------------------------------------------------------
NOT_POR EQU H'0001'
NOT_BOD EQU H'0000'
;----- OSCCAL Bits --------------------------------------------------------
CAL5 EQU H'0007'
CAL4 EQU H'0006'
CAL3 EQU H'0005'
CAL2 EQU H'0004'
CAL1 EQU H'0003'
CAL0 EQU H'0002'
;----- IOCB Bits --------------------------------------------------------
IOCB5 EQU H'0005'
IOCB4 EQU H'0004'
IOCB3 EQU H'0003'
IOCB2 EQU H'0002'
IOCB1 EQU H'0001'
IOCB0 EQU H'0000'
;----- IOC Bits --------------------------------------------------------
IOC5 EQU H'0005'
IOC4 EQU H'0004'
IOC3 EQU H'0003'
IOC2 EQU H'0002'
IOC1 EQU H'0001'
IOC0 EQU H'0000'
;----- VRCON Bits ---------------------------------------------------------
VREN EQU H'0007'
VRR EQU H'0005'
VR3 EQU H'0003'
VR2 EQU H'0002'
VR1 EQU H'0001'
VR0 EQU H'0000'
;----- EECON1 Bits --------------------------------------------------------
WRERR EQU H'0003'
WREN EQU H'0002'
WR EQU H'0001'
RD EQU H'0000'
;----- ANSEL Bits ---------------------------------------------------------
ADCS2 EQU H'0006'
ADCS1 EQU H'0005'
ADCS0 EQU H'0004'
ANS3 EQU H'0003'
ANS2 EQU H'0002'
ANS1 EQU H'0001'
ANS0 EQU H'0000'
;================================================= =========================
;
; RAM Definition
;
;================================================= =========================
__MAXRAM H'FF'
__BADRAM H'06'-H'09', H'0D', H'11'-H'18', H'1A'-H'1D', H'60'-H'7F'
__BADRAM H'86'-H'89', H'8D', H'8F', H'91'-H'94', H'97'-H'98', H'E0'-H'FF'
================================================== ========================
;===========================
;************************************************* *********************
RESET_VECTOR CODE 0x000 ; processor reset vector
goto main ; go to beginning of program
;INT_VECTOR CODE 0x004 ; interrupt vector location
; movwf w_temp ; save off current W register contents
; movf STATUS,w ; move status register into W register
; movwf status_temp ; save off contents of STATUS register
; isr code can go here or be located as a call subroutine elsewhere
; movf status_temp,w ; retrieve copy of STATUS register
; movwf STATUS ; restore pre-isr STATUS register contents
; swapf w_temp,f
; swapf w_temp,w ; restore pre-isr W register contents
; retfie ; return from interrupt
; these first 4 instructions are not required if the internal oscillator is not used
main
call 0x3FF ; retrieve factory calibration value
bsf STATUS,RP0 ; set file register bank to 1
movwf OSCCAL ; update register with factory cal value
bcf STATUS,RP0 ; set file register bank to 0
; remaining code goes here
++++++++++++++++++++++++++++++++++++++++++++++++++ ++++++++++++++++++++++++++++++++++
BSF STATUS,RP0
MOVLW B'00111001'
MOVWF TRISIO
MOVLW B'00010001' ;SET UP ADC?
MOVWF ANSEL
MOVLW B'00000111'
MOVWF OPTION_REG
;CALL 3FFH
;MOVWF OSCCAL
;BCF STATUS,RP0
MOVLW B'00000111'
MOVWF CMCON
MOVLW B'10000001'
MOVWF ADCON0
CLRF GPIO
==================================
BEGIN BSF ADCON0,GO
WAIT BTFSC ADCON0,GO
GOTO WAIT
BSF STATUS,RP0
MOVF ADRESL,W
SUBLW .360
BTFSC STATUS,CARRY
BTSF GPIO,1
BTSF GPIO,2
initialize eeprom locations
;EE CODE 0x2100
; DE 0x00, 0x01, 0x02, 0x03
GOTO BEGIN
END ; directive 'end of program'