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#### Wond3rboy

##### Member
Hi i was about to check the working of the 18F1320's ADC when i read in the datasheet that the maximum impedance of the analog source allowed is 2.5kohm. I was about to do it with a 10k potentiometer.Do i need some external circuitry? But how can we reduce the impedance of the source?

Hi i was about to check the working of the 18F1320's ADC when i read in the datasheet that the maximum impedance of the analog source allowed is 2.5kohm. I was about to do it with a 10k potentiometer.Do i need some external circuitry? But how can we reduce the impedance of the source?

hi,
A quick way would be to connect a 1n0 cap from the wiper of the 10K pot to 0V and add a 1K series resistor from the wiper to the ADC input.

The 1n0 via the 1k provides the charge for the very small internal cap.

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Like this?

I do see that the capacitor will limit the voltage but( like always) why a 1 nano capacitor?. I take that the resistor can be taken more keeping it less then 2.5 k right?What if we follow the 10x rule?270 ohm is available.

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I use the following formula to determine the impedance at the center of a resistor divider (the ADC input);

Code:
impedance = 1/( (1/rUpper) + (1/rLower) )
So in the case of a 10 KOhm pot', the highest impedance occurs when the wiper is in the center position;

Code:
  rUpper  rLower  Impedance  Position
-------------------------------------
5000    5000   2500 Ohms  Center
1   10000      1 Ohm   Full CCW
10000       1      1 Ohm   Full CW
Here's a screenshot of my spreadsheet where I use that formula (I input Vin, R_upper, and R_lower values and the other values are caculated from those);

Kind regards, Mike, K8LH

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hi,
A quick way would be to connect a 1n0 cap from the wiper of the 10K pot to 0V and add a 1K series resistor from the wiper to the ADC input.

The 1n0 via the 1k provides the charge for the very small internal cap.

Sorry Eric, I forgot the picture yesterday, I still ask my question.

I use the following formula to determine the impedance at the center of a resistor divider (the ADC input);

Code:
impedance = 1/( (1/rUpper) + (1/rLower) )
So in the case of a 10 KOhm pot', the highest impedance occurs when the wiper is in the center position;

Code:
  rUpper  rLower  Impedance  Position
-------------------------------------
5000    5000   2500 Ohms  Center
1   10000      1 Ohm   Full CCW
10000       1      1 Ohm   Full CW
Here's a screenshot of my spreadsheet where I use that formula (I input Vin, R_upper, and R_lower values and the other values are caculated from those);

Kind regards, Mike, K8LH

Hi Mike, I see your formula and the spread sheet, i think you made a typo on the ratio part, which should be 10000/5100=1.96078

Like i asked Eric, why you have connected a capacitor? For filtering?

Thanks both of you.

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The capacitor acts as a reservoir so the internal capacitor charges quickly. However, there are other ways to achieve this, the simplest being to allow more acquisition time. There is a formula in the data sheet to calculate how long the internal capacitor will take to charge from a higher source impedance.

Also, if you are only ever reading one (slow moving) analogue value the capacitor will maintain the charge between readings.

Mike.

hi MikeK8.

The divider rule for the 10K pot is not the full story, ie: central rotatation =2K5
This may be the 'impedance' seen by the PICs adc input pin, but its not the time constant of the pot and PIC's internal 120pF cap.

Consider that the 10k pot is set to its 0V position and then is quickly changed to 2.5V [50% rot], the charge path for the 120pF is 5K to +5V.
Likewise if the pot is set to +5V [100% rot] and quickly changed to 2.5V, the discharge path for the 120pF is 5K to 0V.

The external 1n0 has been added to provide the 'charge' source/sink for the 120pF.

As Pommie points out this could be allowed for in the acquisition time within the program.

Also when using a 10K pot the manual change in the pots setting/voltage output is slow compared to the PIC.

The 2K5 impedance rule applies if the adc input is changing rapidly and accuracy is required in the conversion.

Hi Eric, so the entire thing is about giving enough time so that CHold can charge right?

Also if i keep the aquisition time high enough(taking in view the source impedance) for say 5k max for this pot then i will have no problems in using the ADC.

When i use the ADC for actual purposes then i will have to use a capacitor resistor circuit like you advised. Now about the reservior capactor and the resistor combination.

The 1nano charges first to the input value which then charges the internal 120pf capacitor? The resistor limits the charge rate right.

This is amatuer but 'we can not add up the resistor capacitor circuit in the equations in the datasheet?'

If we can manipulate Taq then we can use larger source impedances.

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hi Syed,
I would suggest that for all your pot tests that a 10K will give good results.

The 1n0 [or 2n3 to 4n7] will charge the adc's 120pF quickly via the 1K.

Do not make the cap too high a value else it will take longer to charge/discharge as the 10K pot is varied.

I place a limiting resistor in series with 1n0 cap so if the PIC is powered off the cap isnt discharged into the adc input. In the past I have blown the input clamps of the adc when a slightly larger cap has been used without a limiting resistor, so I now fit a resistor as standard.

Others will disagree with this, but as I am the guy who has to buy the PIC, I fit a limiting resistor.

I would say that the datasheets fastest Taq is based upon a 2K5 source resistance.

As always, if in doubt, try it out, see what effect you get on the adc accuracy.

hi Syed,

Attempt to simulate the ADC circuit in LTspice.

Its rough, but it clearly shows the general idea.

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Others will disagree with this, but as I am the guy who has to buy the PIC, I fit a limiting resistor.
It's a good ideal I was trying to fine it I have a apnote from microchip that said that you can burn out adc pin easy with out limiting resistors

Unless you are trying to sample a voltage above Vdd or below Vss then there's no need to limit the input current. In fact, you want the input current as high as possible so it will charge the sample and hold capacitor quickly.

If you have somehow damaged a pic chip due to this problem then I, with all due respect, suggest the problem was elsewhere.

Mike.

Unless you are trying to sample a voltage above Vdd or below Vss then there's no need to limit the input current. In fact, you want the input current as high as possible so it will charge the sample and hold capacitor quickly.

If you have somehow damaged a pic chip due to this problem then I, with all due respect, suggest the problem was elsewhere.

Yes, you're either exceeding Vdd or applying negative voltages to it.

As long as the input voltage is between 0V and Vdd, then there's no possible problem - if that isn't 100% guaranteed, then use a current limiting resistor.

Notice my tutorial hardware uses such a resistor, as it's fed from a split-supply opamp, so the input could potentially go negative (although the negative voltage generator can't provide enough current to damage it anyway). But for a tutorial, I thought it was a good idea to include it, as the circuit is likely to be copied, and the resistor is important in many cases.

You all may want to read this the 2.5 is for 12 bit adc
Acquisition time is the amount time required to charge the holding capacitor on the
front end of an analog-to-digital converter. The holding capacitor must be given
sufficient time to settle to the analog input voltage level before the actual
conversion is initiated. If sufficient time is not allowed for acquisition, the
conversion will be inaccurate. The required acquisition time is based on a number
of factors, two of them being the impedance of the internal analog multiplexer and
the output impedance of the analog source. An increase in the source impedance
will increase the required acquisition time. In addition, there is a maximum
recommended source impedance. This is generally 10K ohms for the 8- and 10-bit
converters and 2.5K ohms for the 12-bit devices. Please consult the analog-todigital
converter section of your device data sheet for the equation to calculate the
minimum acquisition time for your particular application.

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I bet that it really don't matter with the 18f1230 impedance of the analog source is 10k
I say that because it really don't have the speed that the rest of the 18fxxx has and microchip just changed the impedance value to 2.5 as standard for the whole lot of 18fxxx chips so people would not set the Acquisition time to low on the faster chips.
Here something to that you may want to read
Maximum rate of conversion / bit
1K | 2.29uS
5K | 3.52uS
10k | 5.056uS
50K | 16.66uS
100K | 32.70uS

Assumes no external capacitors

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Thanks Eric, Nigel and Be8obe.I have simulated the circuit in LTspice.

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