phase shift between epwms

[Shadow_warrior]

Hello!
I am using C2000 delfino TMS320F28377s launchpad.
I want to give phase shift between all the modules of epwms but I am not able to do that.
Suppose my reference is epmw2, then epwm 6( the next available epwm) should be shifted by 15 degrees, EPWM7 should be shifted by 30 degrees with respect to EPWM 2 and so on.
Here is the code I am using:
//#############################################################################
//
// FILE: empty_driverlib_main.c
//
// TITLE: Empty Project
//
// Empty Project Example
//
// This example is an empty project setup for Driverlib development.
//
//#############################################################################


//
// Included Files
//
#include "driverlib.h"
#include "device.h"
#define delay 0U
#define time_base 500U //EQUIVALENT TO 50khz FCLK=50MHZ
void EPWM_init(int epwm_group);
void EPWM_setupCommon(uint32_t base, bool phase_enable, uint16_t phase_shift, int count_mode);
void initgpio(void);
//
// Main
//
void main(void)
{
//
// Initialize device clock and peripherals
//
Device_init();

//
// Disable pin locks and enable internal pull ups.
//
Device_initGPIO();

//
// Initialize PIE and clear PIE registers. Disables CPU interrupts.
//
Interrupt_initModule();

//
// Initialize the PIE vector table with pointers to the shell Interrupt
// Service Routines (ISR).
//
Interrupt_initVectorTable();
// Interrupt_register(INT_EPWM1, &epwm1ISR);
// Interrupt_register(INT_EPWM1, &epwm2ISR);
// Interrupt_register(INT_EPWM3, &epwm3ISR);
initgpio();

SysCtl_disablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);

EPWM_init(1);
EPWM_init(2);
EPWM_init(3);
EPWM_init(4);
//
// Enable sync and clock to PWM
//
SysCtl_enablePeripheral(SYSCTL_PERIPH_CLK_TBCLKSYNC);

//Interrupt_enable(INT_EPWM1);
// Interrupt_enable(INT_EPWM1);
//Interrupt_enable(INT_EPWM3);

EINT;
ERTM;
for(; ; )
{

}
}
void EPWM_init(int epwm_group)
{
uint32_t phase_a_base;
uint32_t phase_b_base;
uint32_t phase_c_base;
//EPwm1Regs.TBPHS.half.TBPHS = 0x0010
// EPwm1Regs.TBCTL.bit.PHSDIR = TB_UP;
uint16_t phase_shift_count = 14U;
EPWM_SyncCountMode sync_count_mode = EPWM_COUNT_MODE_UP_AFTER_SYNC; // PLAY WITH THIS
bool phase_enable = false;

switch(epwm_group)
{
case 1:
phase_a_base = EPWM1_BASE;
phase_b_base = EPWM2_BASE;
phase_c_base = EPWM3_BASE;
phase_shift_count = 0U;
phase_enable = false;
sync_count_mode = EPWM_COUNT_MODE_UP_AFTER_SYNC;
break;

case 2:
phase_a_base = EPWM4_BASE;
phase_b_base = EPWM5_BASE;
phase_c_base = EPWM6_BASE;
phase_shift_count = 10U;
phase_enable = true;
sync_count_mode = EPWM_COUNT_MODE_UP_AFTER_SYNC;
break;

case 3:
phase_a_base = EPWM7_BASE;
phase_b_base = EPWM8_BASE;
phase_c_base = EPWM9_BASE;
phase_shift_count = 14;
phase_enable = true;
sync_count_mode = EPWM_COUNT_MODE_UP_AFTER_SYNC;
break;
case 4:
phase_a_base = EPWM10_BASE;
phase_b_base = EPWM11_BASE;
phase_c_base = EPWM12_BASE;
phase_shift_count = 14U;
phase_enable = true;
sync_count_mode = EPWM_COUNT_MODE_UP_AFTER_SYNC;
break;

default:

break;
}

EPWM_setupCommon(phase_a_base, phase_enable, 0, sync_count_mode);
EPWM_setupCommon(phase_b_base, true, 14U, sync_count_mode);
EPWM_setupCommon(phase_c_base, true, 14U, sync_count_mode);

if(epwm_group == 1)
{
// Select INT on Time base counter zero event,
// Enable INT, generate INT on 1st event
EPWM_setInterruptSource(phase_a_base, EPWM_INT_TBCTR_ZERO);
EPWM_enableInterrupt(phase_a_base);
EPWM_setInterruptEventCount(phase_a_base, 1U);
}
}

void EPWM_setupCommon(uint32_t base, bool phase_enable, uint16_t phase_shift, int count_mode)
{
uint32_t q=base;
int i=200;
// Set-up TBCLK
EPWM_setTimeBasePeriod(base, time_base);
// EPWM_setCountModeAfterSync(base, count_mode);
EPWM_setPhaseShift(base, 14U); //phase_shift);
EPWM_setTimeBaseCounter(base, 0U);

// Set Compare values
EPWM_setCounterCompareValue(base, EPWM_COUNTER_COMPARE_A, i);

// Set up counter mode
EPWM_setTimeBaseCounterMode(base, EPWM_COUNTER_MODE_UP_DOWN);
if(phase_enable == true)
{
EPWM_enablePhaseShiftLoad(base);


EPWM_setSyncOutPulseMode(base, EPWM_SYNC_OUT_PULSE_ON_EPWMxSYNCIN);
}
else
{
EPWM_disablePhaseShiftLoad(base); // was disable
EPWM_setSyncOutPulseMode(base, EPWM_SYNC_OUT_PULSE_ON_COUNTER_ZERO);
}
EPWM_setClockPrescaler(q,
EPWM_CLOCK_DIVIDER_1,
EPWM_HSCLOCK_DIVIDER_1);

//
// Set up shadowing
//
EPWM_setCounterCompareShadowLoadMode(q,
EPWM_COUNTER_COMPARE_A,
EPWM_COMP_LOAD_ON_CNTR_ZERO);

//
// Set actions
// Note : EPWM_B is not set as its the complimentary of A
EPWM_setActionQualifierAction(q,
EPWM_AQ_OUTPUT_A,
EPWM_AQ_OUTPUT_HIGH,
EPWM_AQ_OUTPUT_ON_TIMEBASE_UP_CMPA);
EPWM_setActionQualifierAction(q,
EPWM_AQ_OUTPUT_A,
EPWM_AQ_OUTPUT_LOW,
EPWM_AQ_OUTPUT_ON_TIMEBASE_DOWN_CMPA);

EPWM_setDeadBandOutputSwapMode(q, EPWM_DB_OUTPUT_A, false);
EPWM_setDeadBandOutputSwapMode(q, EPWM_DB_OUTPUT_B, false);
//We don't have to swap
EPWM_setDeadBandDelayMode(q, EPWM_DB_RED, true);
EPWM_setDeadBandDelayMode(q, EPWM_DB_FED, true);
//Configuration set for inverter leg
EPWM_setDeadBandDelayPolarity(q, EPWM_DB_RED, EPWM_DB_POLARITY_ACTIVE_HIGH);
EPWM_setDeadBandDelayPolarity(q, EPWM_DB_FED, EPWM_DB_POLARITY_ACTIVE_LOW);

EPWM_setRisingEdgeDeadBandDelayInput(q, EPWM_DB_INPUT_EPWMA);
EPWM_setFallingEdgeDeadBandDelayInput(q, EPWM_DB_INPUT_EPWMA);
//I think these will work only if we are changing db during run time
EPWM_setDeadBandControlShadowLoadMode(q, EPWM_DB_LOAD_FREEZE);
EPWM_disableDeadBandControlShadowLoadMode(q);


//self explanatory
EPWM_setDeadBandCounterClock(q, EPWM_DB_COUNTER_CLOCK_FULL_CYCLE);
EPWM_setRisingEdgeDelayCount(q, delay);
EPWM_setFallingEdgeDelayCount(q, delay);
}
void initgpio(void)
{
GPIO_setPadConfig(18, GPIO_PIN_TYPE_STD);
GPIO_setPinConfig(GPIO_18_EPWM10A);
GPIO_setPadConfig(19, GPIO_PIN_TYPE_STD);
GPIO_setPinConfig(GPIO_19_EPWM10B);
GPIO_setPadConfig(2, GPIO_PIN_TYPE_STD);
GPIO_setPinConfig(GPIO_2_EPWM2A);
GPIO_setPadConfig(3, GPIO_PIN_TYPE_STD);
GPIO_setPinConfig(GPIO_3_EPWM2B);
GPIO_setPadConfig(10, GPIO_PIN_TYPE_STD);
GPIO_setPinConfig(GPIO_10_EPWM6A);
GPIO_setPadConfig(11, GPIO_PIN_TYPE_STD);
GPIO_setPinConfig(GPIO_11_EPWM6B);
GPIO_setPadConfig(12, GPIO_PIN_TYPE_STD);
GPIO_setPinConfig(GPIO_12_EPWM7A);

GPIO_setPadConfig(13, GPIO_PIN_TYPE_STD);
GPIO_setPinConfig(GPIO_13_EPWM7B);

GPIO_setPadConfig(14, GPIO_PIN_TYPE_STD);
GPIO_setPinConfig(GPIO_14_EPWM8A);

GPIO_setPadConfig(15, GPIO_PIN_TYPE_STD);
GPIO_setPinConfig(GPIO_15_EPWM8B);

GPIO_setPadConfig(4, GPIO_PIN_TYPE_STD);
GPIO_setPinConfig(GPIO_4_EPWM3A);

GPIO_setPadConfig(16, GPIO_PIN_TYPE_STD);
GPIO_setPinConfig(GPIO_16_EPWM9A);

GPIO_setPadConfig(17, GPIO_PIN_TYPE_STD);
GPIO_setPinConfig(GPIO_17_EPWM9B);

GPIO_setPadConfig(20, GPIO_PIN_TYPE_STD);
GPIO_setPinConfig(GPIO_20_EPWM11A);

GPIO_setPadConfig(21, GPIO_PIN_TYPE_STD);
GPIO_setPinConfig(GPIO_21_EPWM11B);


}
//
// End of File
//