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# Need help to understand this circuit

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#### mischa

##### New Member
I am looking for some help with regards to the circuit diagram attached to this thread. I came across an application on the internet for using inverters as amplifiers. Apparently CMOS not gates can be used to amplify its input signal by about 150 times when its output is connected to its input via a resistor of about 1M.
Now the above circuit receives a AC signal modulated with a 120KhZ square wave at point A. Apparently the first stage represents a 120Khz tuned high pass filter with amplification and point B is the input to an untuned high pass filter. My understanding of high pass filters is that you have a capacitor in series to a resistor where the capacitor is connected to the signal and the resistor is connected to ground. But this looks nothing like it. Can someone please try and explain how this circuit functions? I am really baffled by it. Point C is the input to the envelope detector…that part makes sense.

View attachment questions.doc

Please post schematics as pictures, not as ms word documents.

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What the heck is a "not gate"? They are called "logic inverters".

The logic inverter with a negative feedback resistor has a low input impedance that is the load for the series capacitor feeding high frequencies to it so it is a highpass filter.

The 10V supply is not shown for the logic inverters. their frequency response is much lower if their supply is only 5V.

hay there...not gates are another term for inverters. What 10V supply are you refering too? would you be able to explain in more detail, maybe? Thanks.

and what about the setup with the inductors, capacitors and logic inverters? How do they work in terms of being a 120khz tuned high pass filter?

Sorry about that Grossel...will be more careful next time

oh by the way, is it possible for a resistor and a capacitor connected in parallel to each other to act as a high pass filter?

hay there...not gates are another term for inverters.
Look at the datasheet of the CD4069 Cmos Logic Inverters from Fairchild, National Semi and Texas Instruments. They do not call a logic inverter a "not gate". Only stupid teachers call a logic inverter a "not gate".

What 10V supply are you refering too? would you be able to explain in more detail, maybe?
The logic inverters in your schematic do not show their +10V power supply. But their +5V input reference voltage is shown.

what about the setup with the inductors, capacitors and logic inverters? How do they work in terms of being a 120khz tuned high pass filter?
They are not a highpass filter. They are a bandpass filter.

is it possible for a resistor and a capacitor connected in parallel to each other to act as a high pass filter?
When a signal must be conducted through them then the capacitor passes the high frequencies and the resistor attenuates low frequencies if there is a load resistance.

Look at the datasheet of the CD4069 Cmos Logic Inverters from Fairchild, National Semi and Texas Instruments. They do not call a logic inverter a "not gate". Only stupid teachers call a logic inverter a "not gate".

I would disagree AG, 'NOT' gate has been in common use for many decades, and is commonplace in logic circles.

It has been common practise for years to use CMOS inverters as inverting op-amps. I once designed and built a speed servo for a model airplane to decode 50 Hz pulse-width modulated 1.5mS pulses, and I used only 4049 inverters and a MOSFET. 4049's have more current capability than 4069's.

Concerning the circuit above, the first two stages are indeed 120KHz resonant tuned circuits. I don't know what the Q of them is. Do you know the resistance of the inductors (coils)?

The signal then goes through a 100pF cap to the zero point on the input of the third inverting stage. With the 10p cap in the feedback loop, it is wired as a 10X amplifier using a capacitive divider. That is strange. Normally inverters are wired with resistors to control gain, not capacitors.

The resistor in this stage is only there for DC bias, so the output DC won't drift.

The fourth stage, whatever it is, is designed wrong. The third stage low output impedance is directly connected to the zero point of an inverting amplifier (fourth stage). The designer doesn't know what he is doing.

The resistors to +5V are not required. These inverting gates are wired in linear mode. They automatically bias themselves. Inserting the resistors is another design mistake.

Bob

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4049's have more current capability than 4069's.
A CD4049 can sink a high output current but source a small output current. Then it is not symmetrical.
A CD4069 sinks and sources the same output current and is symmetrical which makes a better amplifier.

That is strange....
The fourth stage, whatever it is, is designed wrong.... The designer doesn't know what he is doing.
Inserting the resistors is another design mistake.
I agree.

I would disagree AG, 'NOT' gate has been in common use for many decades, and is commonplace in logic circles.
Semiconductor manufacturers do not call a logic inverter a "not gate".
I used to work for Philips.

Semiconductor manufacturers do not call a logic inverter a "not gate".

What has what chip manufacturers call things got to do with anything?.

Designers and engineers call them NOT gates, long pre-dating chips as well.

What has what chip manufacturers call things got to do with anything?.

Designers and engineers call them NOT gates, long pre-dating chips as well.
Maybe I am wrong. Many articles linked by Google talk about "not gates" instead of logic inverters.
One even talks about "true and false" logic states instead of "high and low".

Most of the links are in the UK.
Most semiconductor manufacturers and engineers are "not" in the UK.
People in the UK "talk funny".

Hi,

The circuits with the 220uH inductors in parallel with the two caps and the
inverter form a bandpass filter.

The gain in the pass band is:

G=sqrt(((XL^2+R1^2)*(XL^2+R2^2))/(R3^2*(R2+R1)^2))

where
XL=2*pi*f*220e-6
and
R1 is the inductor ESR, and
R2 is the capacitor ESR, and
R3 is the input source series resistance.

Note that the gain depends highly on the input source resistance.

Also, some tuning may be needed as those bandpass
amps are a bit sharp.

hey

Firstly, thank you all for your help...it really was helpful. This circuit basically has a 220V Ac signal thats been modulated with a 120Khz square wave at the zero crossings of the Ac signal as the input. this signal then goes through the filters and the output is supposed to be feed to a microcontroller...it will be high at all the zero-crossings that were modulated by the 120Khz wave.

You guys said that the design makes no sense as far as the filters are concerned? How would you go about designing this and why?

You guys said that the design makes no sense as far as the filters are concerned?
I probably missed something, but this should get you started:

1) Performance of first stage is highly dependent on unknown source.
2) The first two filters were described a 'high pass tuned to 120kHz'. This is untrue. They are bandpass.
3) The filters are very sharp. Nice in theory, a nightmare in production.
4) First and second stages not decoupled. Low output impedance of first stage swamps performance of second stage's network.
5) Supply voltage on gates not shown. Inferred at 10V but not confirmed.
6) 470k to 5V at output of second stage doesn't do anything.
7) Unusual (but not wrong) to use capacitive gain setting on third stage.
8) Third and fourth stages not decoupled. Feedback around fourth stage swamped by third stage output.
9) Output stage is biased in the linear (uncertain, logic 'maybe', etc.) region. With no signal, its output is unknown. With signal, its output is '1', which may or may not be different from idle state.
10) If point D is given to a micro processor, its 0-10V swing may destroy one or both of them.

You really really need to post more of the circuit. If 220VAC is applied to point A then it will all explode.

 I must correct myself - the 10M bias resistor at point A is irrelevant, since this point is dominated by the DC feedback from the gate output. This makes the 5V bias point unimportant, so the supply voltage can't be inferred. (points 5 and 10). [/edit].

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It's a horrible circuit.

You can build a audio digital amp with just one inverter, 2 resistors and a cap.

Use the cap on the inverter input and resistor as inverter feedback, using the standard single inverter oscillator design. Run it at 100kHz should be fine, with a high value resistor.

Then couple the low freq AC (audio) signal through a resistor to the oscillator input. That AC audio (at any point in time) provides a DC bias to the osc and the inverter automatically changes duty cycle based on the DC bias.

So the single inverter osc changes duty cycle based on the voltage of the audio input. Provided your audio signal is 1 to 2v p/p you have a digital audio amp.

Note you can use the spare inverters to make a push-pull bridge output.

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