Sirius Black
New Member
I am to design an amplifier using 2N4401 BJTs. The specs include having a voltage gain of (+-)100. It needs to have input resistance above 1k and low output resistance. I decided to use a Common Emitter for the first stage to get the required gain. Then follow this with a common collector to achieve my low output resistance. I have attached my design so far, and keep in mind the capacitors are only for blocking DC, I have no restrictions on the bandwidth for which my amplifier should work. My values for R1, R2 are to keep a voltage of about .66V at Vb because I assumed Ic to be 1ma and the voltage drop across Re to be .06V. Vb = Vbe(.6)+.06. For R3 and R4 I wanted Vb to be half of Vcc(12V) so that I had a large amount of room for my output voltage swing.
My questions are:
-Does this design look like I'm on the right track to designing this amplfier, if not what am I doing wrong?
-To get my 100 gain, I approximated the gain on the CE to be -Rc/Re which should be 100, is this correct to assume?
-How can I simulate my circuit in LTspice, or a similar SPICE program? I don't know my Vs, but I assume it is ac because I must meet a design spec of at least enough room for my output voltage to swing (+-)2.5V. I also don't know my load resistance.
My questions are:
-Does this design look like I'm on the right track to designing this amplfier, if not what am I doing wrong?
-To get my 100 gain, I approximated the gain on the CE to be -Rc/Re which should be 100, is this correct to assume?
-How can I simulate my circuit in LTspice, or a similar SPICE program? I don't know my Vs, but I assume it is ac because I must meet a design spec of at least enough room for my output voltage to swing (+-)2.5V. I also don't know my load resistance.
