multi loop pll frequency synthisier

[roomi1973]

hi there, iwas wondering if any body can help me to design amulti loop phase locked loop frequency synthisier to generate arange of frequencies between 1-10 MHZ, at aresolution of 10KHZ.
NOTE: Ineed two pll loop
thanks

 

[kchriste]

Why not just use a DDS? It will be way simpler and faster to respond to frequency changes:
https://hem.passagen.se/communication/dds.html

 

[roomi1973]

Why not just use a DDS? It will be way simpler and faster to respond to frequency changes:
https://hem.passagen.se/communication/dds.html

hi, thanks for the reply, but my supervisor asks to use indirect digital synth.
i.e phase locked loop.
regards

 

[RadioRon]

This is a relatively advanced assignment that requires you to crack open the books for some research. I recommend: Digital PLL Frequency Synthesizers by Ulrich Rohde. When I first got into synthesizer design, I read several books about the subject and found that those books that focus on phase locked loops (such as texts by Gardner) were not as useful as those that specifically addressed frequency synthesizers. There are many texts covering these subjects now, so have a look around.

A dual loop design is typically not covered in the application notes for typical PLL synthesizer chips, but you may learn some things from such app notes and data sheets anyway. Makers include Fujitsu, Freescale, Analog Devices, Atmel, Silicon Labs, NXP, On Semi, Maxim, and many others.

Here is an old favorite part that I used way back in 1980 that is still available today:

**broken link removed**

The application section of this datasheet is very useful for the beginner and this IC is easy to use and would suit your project.

 

[RadioRon]

hi there, iwas wondering if any body can help me to design amulti loop phase locked loop frequency synthisier to generate arange of frequencies between 1-10 MHZ, at aresolution of 10KHZ.
NOTE: Ineed two pll loop
thanks

PM me for additional guidance on specific designs.