Mosfet Hartley Oscillator.

[Lightium]

I am having trouble designing a Hartley oscillator using Mosfet's because Mosfet's a new to me still. All I know is that Q/I= switching time. I had to change the extension on the file, EOL won't take an sp3 file?

 

[rjenkinsgb]

You have no gate bias control, it's connected to power??

This is a Hartley oscillator in its commonest form; the only real change to substitute a a FET is to adjust the bias divider to give and appropriate standing current with the new device.

The coupling caps isolate the DC from the inductor and the DC levels & standing current are totally controllable:

Or with a choke in place of the resistor, as the output load:

 

[Lightium]

Thanks for the quick response. I'll give the first schematic a try in the morning.

 

[danadak]

Two topologies :

Regards, Dana.

 

[Lightium]

Danadak, thanks for the pointers.

 

[Lightium]

So basically just go about construction has I would for a BJT, but design the bias for a Mosfet?

 

[kubeek]

Why are you using such a huge transitor for an oscillator?

 

[Lightium]

Why are you using such a huge transitor for an oscillator?

I am building power source for ion thruster.

 

[Lightium]

OK so I settled on this configuration of the hartley.

 

[Lightium]

This is not ideal because II am wasting a ton of energy in the bias alone.

 

[rjenkinsgb]

Try moving the inductor coupling cap to the top end (or output) instead of the bottom end, then feed the bias at the inductor centre tap?

You should then hopefully be able to use a large decoupling cap on that to handle the AC ripple and much higher value divider resistors?

Why hartley? if you need high power, wouldn't a more conventional power oscillator with drive and feedback windings be more suitable, or a low power osc driving a power device?

 

[Lightium]

Yes, a low power osc driving a power device, but I really intend to use the mosfet.

 

[Lightium]

I am frustrated. this is my latest incarnation.

 

[Nigel Goodwin]

This is not ideal because II am wasting a ton of energy in the bias alone.
View attachment 141302

How on earth did you get to such stupidly low bias values?.

 

[Tony Stewart]

Here are a couple more LC FET square wave oscillators I just whipped up.

https://tinyurl.com/2fl68ef3

With the sine wave on the input cap.

You can expect most of power dissipated into the drain R on the left.
On the right there will be shoot-through current spike on each transition if the Threshold Vt is much lower than Vdd/2. So ideally Vt = Vdd/2, except for logic.

Vt or Vgs(th) @ I (<1 mA) may be tested as follows.

 

[Lightium]

How on earth did you get to such stupidly low bias values?.

I believe I was trying to supply enough current for the switching speed.

 

[Lightium]

Here are a couple more LC FET square wave oscillators I just whipped up.

I'll give the one on the left a try. I had an earlier attempt like that only I was missing the cap on the center tap.

 

[kubeek]

Do you plan to do everything with just a single transistor? It might be more efficient and generally better to use a small transistor for the oscillator and then a big transistor as a power stage.

Also, what kind of ion thruster runs on AC?

 

[Lightium]

Do you plan to do everything with just a single transistor? It might be more efficient and generally better to use a small transistor for the oscillator and then a big transistor as a power stage.

Also, what kind of ion thruster runs on AC?

Yes, that was discussed and is step two when I give-up on a monolithic design.

 

[Tony Stewart]

I'll give the one on the left a try. I had an earlier attempt like that only I was missing the cap on the center tap.

The value of the centre tap. cap. C2 is not critical as it is creating a shunt to ground, but just cannot be too much smaller than the main feedback resonant cap. But it is essential to have one to create the phase shift. C2 can be almost any value, say 100 pf to 100 nF but not 0 pF. fo=1/(2pi{(L1+L2)C}^.5)

The phase shift is 0 deg without the Cap. to ground.