Measuring absolute capacitance.

[Blueteeth]

Hi all,

Well, after building not one but TWO LC meters, I am quite satifised with the results.

First: **broken link removed**
Second: **broken link removed** (measures ESR too!)

Ultimately, they measure 'relative' capacitance... relative to a known value. Since they both rely on calibration (first one should really use an accurate calibration cap) in order to get <2% accuracy, I should probably use a precision cap, such as a silver mica, or perhaps a tight spec polystyrene cap to calibrate these. It *should* be a one-time process, perhaps recalibrating my meters every so often.

Whilst I could order some relatively expensive 1% (even seen some 0.3% silver mica's) before I do so, as a little 'test' I was thinking about a very accurate way to measure absolute capacitance... one that doesn't require a precision capacitor in the first place - only precision resistors, and the ability to measure time periods accurately. (read: microcontroller).
Seems a bit 'chick and egg' to design a way of measuring capacitance....for a capacitance meter. But the difference is, the above meters are for convenience, and speed, with a nice simple readout. For a 'one-time' measurement, I will be happy to manually do the maths, either with a pen, or MS Excel, it will be a quick prototype with no bells and whistles.

Since I know the infamous NE555 insideout, that looks like a good start. It's internal resistors aren't exactly precise, so I was thinking of using the same principle, but with LM393 comparators, and precision resistors (0.1% 10k's... I have lots for some reason).

Basic idea: Fully discharge the cap we're testing. Start charging via another precision resistor at VCC (same supply as the resisitor ladder used for the comparator references). First comparators thresshold is at VCC/3. Second at VCC/6 - just like the 555 timer. This takes VCC out of the equation since it is relative. Instead of charging/discharging the cap whenever each threshold is reached (keeping the cap voltage between VCC/3 and VCC/6) - a microcontroller simply measures the time between the two thresholds. The cap can charge way beyond the VCC/6 threshold, but is discharged (to at least VCC/10) between tests. The propagation delays of the two comparators should be more or less the same. And will cancel when the period is measured. ((Tth2 + CompDLY) - (Tth1 + CompDLY)) . Where Tth1 and 2 are the threshold times.

This has all been done before, and definately not as accurate as a bridge, but I'm hoping for +/-0.5% accuracy here. With 0.1% resistors, and a microcontroller with a timer running at 20MHz (AVR) does anyone think this is achievable?

As I said, its more of a novelty/academic problem, as I could just order some precision caps for calibration. But all it requires is precision resistors, and an accurate time measurement (20ppm with crystal oscillators). Could prove to be a good 'starter' to accurately find the real value of a capacitor, which can then be used for calibration. Not designing a full circuit, just a 'knock-up' for single use. Any takers?

Blueteeth.

 

[MrAl]

Hi,

What value caps do you intend on measuring, that is, what is the range of capacitance you are looking at?

I think you meant it charges from 1/3 Vcc to 2/3 Vcc right? That's the 555.

If this helps any, the time to charge from 1/3 Vcc to 2/3 Vcc is t=ln(2)*R*C, and to charge from 1/4 Vcc to 3/4 Vcc the charge time is t=ln(3)*R*C, and to charge from 1/5 Vcc to 4/5 Vcc the charge time is t=ln(4)*R*C. From this it is plain to see that to charge from 1/n*Vcc to (n-1)/n*Vcc the charge time is:
t=ln(n-1)*R*C

 

[Roff]

However you do it, using a microcontroller gives you the capability of doing averaging, which can reduce noise and timing quantization errors.

 

[Blueteeth]

Hi guys,

First of all, yep I totally got it wrong... its what I get for trying to get my idea down on text to quickly. 1/3 VCC to 2/3 VCC exactly. *why* I did vcc/6 I do'nt know....

MrAL, you were correct about the maths. Just before I posted, I just scribbled on a knapkin (I'm sure other engineers do that?) to re-aquaint myself with the exponential charging, and RC time constant. I could put that in Excel just to make tihngs easier to convert a 'time' (and value for R) to the capacitance.

As for 'range', this is why its a very simple test. This method, without using a microcontorller to scale things and change the value of R, its pretty limited. But thats fine, I'll just 'pick' a value - say, 1nF - 22nF, or whatever capacitors I have available to me - and design the component values around that. In my original post the first 'LC meter' requires two stable (and accurate) 1nF caps. In the second, it can be calibrated to virtually any value, in two ranges (requiring a low value cap, and a high value).

So, perhaps I'll start by picking 1nF. Being a low value, I guess it would be prudent to choose a relatively large value for R to keep the time constant long - allowing my microcontroller more time to measure the period, thus increasing resolution. Then perhaps a 22nF cap (reducing R by a factor of 20 to keep things more or less the same). All values for 'R' will be in discrete steps, so I can use series/parallel combinations of the same value of precision resistor. So with my 0.1% 10k resistors, we're talking 10,20,30,50k etc..

Roff. Excellent point! Whilst thinking about measuring a quantity (resistance, capacitance opr inductance) I realise that the only real thing I can measure to any decent degree of accuracy is time/frequency. Voltage, current, resistance is great with my digital multimeter, but still around 1%. So thats why I chose a microcontroller with a very VERY simple periuod measurement. And of course, as you rightly pointed out, as its digital, one can simply do as many tests as required and average the result for better precision. As I'm trying to keep things simple, I will probably avoid windowed averaging and just do a 'set' number of tests, say 32 to make division easier.

So, given the basic idea. Here's what I believe will be some sources of error (feel free to check my half arsed maths..):
- Parasitic capacitance: leads of the test capacitor, PCB traces, giving a slightly higher reading. a few pF with VERY short leads.
- Comparator offset errors. With a 'VCC' of say, 9v. And a max offset error of 3mV (for the LM393) the error of the voltage window (two comparators) becomes +/-6mV across 3v = +/-0.2%. Sure there are better comparators, but I'm not buying some precision comparators just for this (might as well jst buy the precision caps eh?) using what I got, to see just how accurate one can get it.

- Resistance tolerance. 0.1%. For setting the 'threshold references, and the R in the RC circuit.

- Differences in propagation delay between the two comparators - in the same package, probably very small and I'm going to throw caution to the wind and ignore it.

- Resolution of the period measurement. This is down to how long the RC time constant is (how large R is) and the speed of the counter. 50nS for an AVR timer. From a quick test in excel (created in a few minutes..) seems the error varies from 0.09% to 0.16% using C=1nF, and R = 50k. I will be happy to share this spreadsheet so you don't just take my word for it. Should increase R to something a bit higher. Roff, you hit the nail on the head with regard to reducing quantization errors.

- test capacitor loss: This will mean it will take a bit longer to charnge than it should. As I'm testing polystyreme, silver mica's, and possibly boxed poly's, loss sohuld be low. But I am unsure how to put this in terms of a specific percentage.

All the above, in a very non-scientific 'guessing' way, leads me to believe a total of +/- 1% is the best I can muster without accurate equipment to measure such quantities. This is on parr with the actual LC meters themselves, but with the one advantage of being that accurate without calibration.

Once again, this is all a lot of effort, as I keep saying, I could just spend a few quid (bucks you guys over the pond) for a half decent silver mica. But I once i 'get going' with an idea, I generally have to see it through

Again, any criticisms, idea's are more than welcome. This was just me tihnking over a cup of coffee, so I'm sure those with far more experience have better solutions, given the restrictions I've imposed.

Blueteeth

 

[MrAl]

Hi again,

As Roff pointed out, if you do multiple measurements and then average the results you get a better overall measurement.
Interestingly, one of the best ways to accomplish this is not to take 10, 20, or 100 readings in time, but consider this...
If we take one time reading we get some accuracy, if we take 32 time readings we get better accuracy, if we take 64 readings we get even better accuracy, etc. But what if we could take an infinite number of readings, that would give us the best possible result, at least in theory. Also interesting is that would require a lot of time, but since frequency=1/time if time is very large frequency is very small, so instead of making a whole bunch of time measurements we can make one (or maybe two) frequency measurements.

To make a long story short, a simple prototype of this would be a 555 with a set value of resistor(s) and the capacitor used for the frequency timing would be the unknown capacitance. We could then measure the frequency of the output of the 555 and correlate that to the actual capacitance value. What this means is we would get time averaged readings as the cap charged and discharged from 1/3 Vcc to 2/3 Vcc. If the cap charged and discharged 10000 times in one second and we took a one second snap shot we'd already have the average of 20000 cycles (because of the charge and discharge periods). This should render a decent reading, and the meter could sit there and constantly take new readings and update the display.
Of course you may want to improve on the 555 using a more accurate circuit, but that's up to you.
The upper resistor could be swapped out using the micro controller too to get different ranges.

Just some ideas.

 

[Blueteeth]

Hi again MrAl!

You're right! as the number of readings approaches infinity, the errors that averaging can negate (quantization errors, drift, noise etc..) effectively approach 0. And 'frequency' is of course a real-time measure of period averaged over around a second (for most frequency meters). Giving a total average of 'F' samples. For say 15kHz, thats 15000 samples... pretty damn good.

I would really like to use the 555 timer, be it the bipolar or CMOS version, because of the simplicity. Almost direct capacitance to frequency conversion, with the added benefit of easily changing ranges (ranges are not required for this). The reason I abandoned the idea of using a 555 wasn't just the tolerance of its internal resisitors changing the trigger/threshold votages. It is also down to its comparators propagation delay, and the delay for its set/reset latch.

After running a couple of simulations in LTspice, with an 'ideal' 555, configured for 50/50 duty (in this case only one resistor, conneected to 'out'), and effectively building a 555 from LM393's, and a set/reset latch. The results were a difference in frequency, despite making almost all components 'ideal'.

The way I see it is, the 555, charges up the cap via R connected to 'out' from 1/3VCC. Once the threshold is reached, 2/3VCC, it resets the latch, which discharges the cap, also through R. The delay between the threshold being reached, and the 555's output going low, means that the cap is still charging, above 2/3VCC..albeit very briefly (700nS-1uS). This delay is similar for when the cap is discharging - when the cap voltage drops to 1/3VCC, it continues to discharge until the output is set high (again, roughly 700nS, AFTER the cap voltage has fallen to 1/3VCC). What this means is... the caps voltage should be between 1/3VCC and 2/3VCC, oscillating between the two thresholds - but the added slight delay means its slightly outside of this range. Although it's not as simple as saying 'each period is increased by 2 x comparator progation delay' is does seem to effect things by >1%. And gets worse as frequency increases.

That sounds very small an insignificant, and would seem that the error it produces can be significantly reduces by lowering the frequency of operation (raising the value of R).
All that said: Using a 555-like circuit with comparators and a latch - *building* it instead of using a 555 because we need to use precision resistors - *could* prove accurate if the delays of the comparators (and the delay of the SR latch) are known. One can then use this delay to calculate how much more the capacitor discharges, after the trigger voltage is reached, and so, its voltage, and therefore, how long it takes to rise to reach the upper threshold. Very labour intesive boring maths, but a 'correction factor' could be added based on rough values from the comparators datasheet. Delays estimated to within 50ns, depending on the freuqnecy of operation (R and C) should be <0.2%. Without this correction, errors climb to > 1.6%.

Ultimately, my original method, single slope charge, the comparators' delays cancel, but without a nice simple oscillation (charging AND discharging) requires a microcontroller to measure period. With a 555 timer - like circuit, these delays would have to be taken into account, but would allow one to use an 'off the shelf' frequency counter. Without the microcontroller doing any maths, just outputing a period - both idea's would mean plugging in a number or two into a spreadsheet, to get a fairly accurate value of C. Both idea's have merits.

Many apoloiges for my long and geekily details posts, I simply type what I'm thinking. If I stay with this idea, once I DO order some precision caps, I can test my meters, as well as both the above idea's. I'm hoping that the super simple 555 timer idea, with some clever corrections in Excel, would prove just as accurate.

If anyone would like LTspice circuits, or spreadsheet about this, let me know, I've only spent a total of maybe a couple of hours on this, but already got a folder full of em. It's more work tahn necessairy, but, sadly, I find it interesting

Blueteeth

 

[Mr RB]

You could use a precision current reference (maybe a LM334?) that would charge the cap with an exact current, then just measure the charge time with a PIC and average many cycles if needed. Then you have "absolute capacitance value" as it eliminates cap ESR in the measurement.

That would still include "other" circuit capacitances, but you could zero them out in software.

 

[Roff]

The advantage of your original scheme is that, as you said, the comparator prop delays, if they are equal, will cancel. When you make an oscillator, the comparator (and logic) prop delays are inside the loop, so, unless you make the frequency low enough that they are insignificant, will always make the capacitor appear to be larger than it really is.
Having said that, take a look at this circuit with a fast comparator and a fast inverter in the loop.
One advantage of using a single comparator is that input offset voltage is irrelevant, as long as it doesn't change when the common mode level changes. The CMOS inverter provides rail-to-rail output that is needed for the feedback. I paralleled the inverters to minimize the timing resistance error. This will add a little prop delay due to the increased capacitive loading on the comparator.
Resistor values are a compromise between bias and offset current errors on the one hand, and error due to the output impedance of the paralleled inverters on the other. FFTs showed that, with a 100usec time constant (ideal frequency=7.2135kHz), the error changes sign when the timing resistance is around 50k. With Rt=10k, the frequency error was -0.17%. With Rt=100k, it was +0.11%. The schematic and .ASC files are attached.
Here is the comparator subckt file:

*
*   ====>      REFER TO MAX976 DATA SHEET       <====
*
*
* connections:        non-inverting input, +IN
*                     |   inverting input, -IN
*                     |   |   positive power-supply, V+
*                     |   |   |   negative power-supply, V-
*                     |   |   |   |   output, OUT
*                     |   |   |   |   |
* NODE CONNECTIONS:   1   2   3   4   97
*
.subckt max976   1 2 3 4 97
*
  f101    3  9 v1 1
  iee100   7  400 dc 100.0E-6
  q101    9  20  7 qin
  q2    8  21  7 qin
  q3    9  8  399 qmo
  q4    8  8  399 qmi
  VMB 400 4 0V
  VPB 399 3 0V
***================
VIN1 2 23 .95
VIN2 1 25 .95
***
DCM2 70 3 DP
DCM1 4 24 DP
VCM1 70 24 -.1V
DCM3 4 26 DP
VCM2 71 26 -.1V
DCM4 71 3 DP
***
IPSUP 3 0 -2.3MA
INSUP 0 4 0UA
***
EHYST 23 20 POLY(1) 0 60 0 1
VS2 21 25 0V
.model qin NPN(Is=800.0E-18 Bf=666.3)
.model qmi PNP(Is=800.0E-18 Bf=1002)
.model qmo PNP(Is=800.0E-18 Bf=1000 Cjc=1E-15 Tr=17.4E-9)
.MODEL PMOS PMOS 
*(VTO=-1.7 KP=1.8E-3)
  e1   10  4  3  9  2
  v1   10 11 dc 0
  q5    5 11  44 qoc
  vshift 44 4 0v
  R55 3 5 10K
  DP5 5 3 DP
  DP6 4 5 DP
***============= Hysterisis section
GH 0 51 97 101 1E-6
ECM 101 0 3 4 0.5
RCM 101 0 10MEG
****==============COMPARATOR POINT FOR CREATING LOGIC OUTPUT, +-1, hi,lo.
RH1 3 51 1E11
RH2 4 51 1E11
DP1 51 52 DP
DP2 53 51 DP
VP1 52 0 1V
VP2 53 0 -1V
***=================
IHYST 55 0 -1.5E-9
*GENERATES 1MV OF HYST.
RREF 55 0 1E6
*LOGIC OUTPUT, NODE 60 ALTERS THE POLARITY, SO 55 SHOULD ALWAYS BE POS.
GMULT 60 0 POLY(2) 51 0 55 0 0 0  0 0 1E-6
RMULT 60 0 1E6
*================
*EH 3 98 3 4 0.5
VVIRTUAL 98 0 0V
F5 3 38 VA8 1
D9 40 38 DX
D10 38 3 DX
VA7 3 40 0
F6 3  4 VA7 1
G12 98 32 5 0 7.04E-3
R15 98 32 140
D3 36 41 DP
D4 42 37 DP
V4 37 34 .05
V5 34 36 .05
***V4,V5 SET ISC, V4 VOL, V5 VOH.
R16 41 35 10
R17 42 35 10
E11 3 33 3 32 1
VA8 33 34 0V
RL 35 97 25
*========================
.model qoc NPN(Is=800.0E-18 Bf=10.35E3 Cjc=1E-15 Tf=30E-12 Tr=11.7E-9)
  dp    4  3 DX
.MODEL DX  D(Is=800.0E-18)
.MODEL DP D(N=0.001)
*=======================
***== MODELS USED ==***
.MODEL DX2 D(IS=1E-15 n=0.001) 
*.MODEL DX D(IS=1E-15) 
.ends
*
*
*
*
*   ////////////// MAX978 MACROMODEL //////////////////
*
*   ====>      REFER TO MAX976 DATA SHEET       <====
*
*
* connections:        non-inverting input, +IN
*                     |   inverting input, -IN
*                     |   |   positive power-supply, V+
*                     |   |   |   negative power-supply, V-
*                     |   |   |   |   output, OUT
*                     |   |   |   |   |
* NODE CONNECTIONS:   1   2   3   4   97
*
.subckt max978   1 2 3 4 97
*
  f101    3  9 v1 1
  iee100   7  400 dc 100.0E-6
  q101    9  20  7 qin
  q2    8  21  7 qin
  q3    9  8  399 qmo
  q4    8  8  399 qmi
  VMB 400 4 0V
  VPB 399 3 0V
***================
VIN1 2 23 .95
VIN2 1 25 .95
***
DCM2 70 3 DP
DCM1 4 24 DP
VCM1 70 24 -.1V
DCM3 4 26 DP
VCM2 71 26 -.1V
DCM4 71 3 DP
***
IPSUP 3 0 -2.3MA
INSUP 0 4 0UA
***
EHYST 23 20 POLY(1) 0 60 0 1
VS2 21 25 0V
.model qin NPN(Is=800.0E-18 Bf=666.3)
.model qmi PNP(Is=800.0E-18 Bf=1002)
.model qmo PNP(Is=800.0E-18 Bf=1000 Cjc=1E-15 Tr=17.4E-9)
.MODEL PMOS PMOS 
*(VTO=-1.7 KP=1.8E-3)
  e1   10  4  3  9  2
  v1   10 11 dc 0
  q5    5 11  44 qoc
  vshift 44 4 0v
  R55 3 5 10K
  DP5 5 3 DP
  DP6 4 5 DP
***============= Hysterisis section
GH 0 51 97 101 1E-6
ECM 101 0 3 4 0.5
RCM 101 0 10MEG
****==============COMPARATOR POINT FOR CREATING LOGIC OUTPUT, +-1, hi,lo.
RH1 3 51 1E11
RH2 4 51 1E11
DP1 51 52 DP
DP2 53 51 DP
VP1 52 0 1V
VP2 53 0 -1V
***=================
IHYST 55 0 -1.5E-9
*GENERATES 1MV OF HYST.
RREF 55 0 1E6
*LOGIC OUTPUT, NODE 60 ALTERS THE POLARITY, SO 55 SHOULD ALWAYS BE POS.
GMULT 60 0 POLY(2) 51 0 55 0 0 0  0 0 1E-6
RMULT 60 0 1E6
*================
*EH 3 98 3 4 0.5
VVIRTUAL 98 0 0V
F5 3 38 VA8 1
D9 40 38 DX
D10 38 3 DX
VA7 3 40 0
F6 3  4 VA7 1
G12 98 32 5 0 7.04E-3
R15 98 32 140
D3 36 41 DP
D4 42 37 DP
V4 37 34 .05
V5 34 36 .05
***V4,V5 SET ISC, V4 VOL, V5 VOH.
R16 41 35 10
R17 42 35 10
E11 3 33 3 32 1
VA8 33 34 0V
RL 35 97 25
*========================
.model qoc NPN(Is=800.0E-18 Bf=10.35E3 Cjc=1E-15 Tf=30E-12 Tr=11.7E-9)
  dp    4  3 DX
.MODEL DX  D(Is=800.0E-18)
.MODEL DP D(N=0.001)
*=======================
***== MODELS USED ==***
.MODEL DX2 D(IS=1E-15 n=0.001) 
*.MODEL DX D(IS=1E-15) 
.ends
*
*
*
*
*   ////////////// MAX998 MACROMODEL //////////////////
*
*   ====>      REFER TO MAX976 DATA SHEET       <====
*
*
* connections:        non-inverting input, +IN
*                     |   inverting input, -IN
*                     |   |   positive power-supply, V+
*                     |   |   |   negative power-supply, V-
*                     |   |   |   |   output, OUT
*                     |   |   |   |   |
* NODE CONNECTIONS:   1   2   3   4   97
*
.subckt max998   1 2 3 4 97
*
  f101    3  9 v1 1
  iee100   7  400 dc 100.0E-6
  q101    9  20  7 qin
  q2    8  21  7 qin
  q3    9  8  399 qmo
  q4    8  8  399 qmi
  VMB 400 4 0V
  VPB 399 3 0V
***================
VIN1 2 23 .95
VIN2 1 25 .95
***
DCM2 70 3 DP
DCM1 4 24 DP
VCM1 70 24 -.1V
DCM3 4 26 DP
VCM2 71 26 -.1V
DCM4 71 3 DP
***
IPSUP 3 0 -2.3MA
INSUP 0 4 0UA
***
EHYST 23 20 POLY(1) 0 60 0 1
VS2 21 25 0V
.model qin NPN(Is=800.0E-18 Bf=666.3)
.model qmi PNP(Is=800.0E-18 Bf=1002)
.model qmo PNP(Is=800.0E-18 Bf=1000 Cjc=1E-15 Tr=17.4E-9)
.MODEL PMOS PMOS 
*(VTO=-1.7 KP=1.8E-3)
  e1   10  4  3  9  2
  v1   10 11 dc 0
  q5    5 11  44 qoc
  vshift 44 4 0v
  R55 3 5 10K
  DP5 5 3 DP
  DP6 4 5 DP
***============= Hysterisis section
GH 0 51 97 101 1E-6
ECM 101 0 3 4 0.5
RCM 101 0 10MEG
****==============COMPARATOR POINT FOR CREATING LOGIC OUTPUT, +-1, hi,lo.
RH1 3 51 1E11
RH2 4 51 1E11
DP1 51 52 DP
DP2 53 51 DP
VP1 52 0 1V
VP2 53 0 -1V
***=================
IHYST 55 0 -1.5E-9
*GENERATES 1MV OF HYST.
RREF 55 0 1E6
*LOGIC OUTPUT, NODE 60 ALTERS THE POLARITY, SO 55 SHOULD ALWAYS BE POS.
GMULT 60 0 POLY(2) 51 0 55 0 0 0  0 0 1E-6
RMULT 60 0 1E6
*================
*EH 3 98 3 4 0.5
VVIRTUAL 98 0 0V
F5 3 38 VA8 1
D9 40 38 DX
D10 38 3 DX
VA7 3 40 0
F6 3  4 VA7 1
G12 98 32 5 0 7.04E-3
R15 98 32 140
D3 36 41 DP
D4 42 37 DP
V4 37 34 .05
V5 34 36 .05
***V4,V5 SET ISC, V4 VOL, V5 VOH.
R16 41 35 10
R17 42 35 10
E11 3 33 3 32 1
VA8 33 34 0V
RL 35 97 25
*========================
.model qoc NPN(Is=800.0E-18 Bf=10.35E3 Cjc=1E-15 Tf=30E-12 Tr=11.7E-9)
  dp    4  3 DX
.MODEL DX  D(Is=800.0E-18)
.MODEL DP D(N=0.001)
*=======================
***== MODELS USED ==***
.MODEL DX2 D(IS=1E-15 n=0.001) 
*.MODEL DX D(IS=1E-15) 
.ends

 

[Blueteeth]

Ahh constant current, giving a nice linear slope. I'll see if my multimeter's voltage measurement is accurate enough, then I could use a precision resistor to measure the current - that way calibrating it. The example you provided (I know theres many other precision current sources), the LM334, has an initial accuracy of +/-3%. As I said above I should be able to trim that. I am very impressed with its temp/voltage drift though...seeing 'ppm' everywhere

I am unsure how to zero out parasitic capacitances, because well, without a reference 'known' value capacitor, I don't see how it can be measured. Of course, this can quickyl baloon into yet another 'capacitance meter design', but it might prove useful to someone here, where precision is paramount and convenience/speed isn't (no auto ranging, no bells and whistles).

I had also forgotten about ESR, and its effect on the way one measures a cap. Even though I will be using it to measure low value film caps for calibrating other meter.... it still has ESR, and it looks like that will affect the accuracy by >1%.

One more tihng, I'm pushing this '1% max' accurancy because that is the total error of all the parts. Comparator offset, delays, resistance tolerances, and its surprising how it all adds up. a 0.2% here, and 0.5% there, and its already approaching 1%. I have ordered some 1% polystyrene caps, very cheap (so I'm not expecting within 1%) but also some 0.3% silver mica's. Defeats the purpose of this thread really to just use those, but they can be used as a test against the idea's presented here. Maybe even increasing the accuracy of other meter designs. So, despite this rather 'for the sake of curiosity' method, might prove useful to someone.

How exactly does the industry measure capacitance? There must be some starting reference somewhere - or do they generally use AC bridges and precision RMS voltage measurement?

Blueteeth.

 

[dougy83]

How exactly does the industry measure capacitance? There must be some starting reference somewhere - or do they generally use AC bridges and precision RMS voltage measurement?

There are starting references, see https://en.wikipedia.org/wiki/SI_base_unit for a few examples

In your attempt to remove the need for a reference capacitor, you've introduced the need for a reference resistor. You are also relying on a reference crystal oscillator.

The advantage I can see in using a resistor as the reference is the fact that it's much easier to get a precision resistor than it is to get a precision capacitor.

 

[Mr RB]

I think all you need is a measured constant current source, then hold the cap shorted with a PIC pin, then release the pin, start the timer and use the PIC comparator to detect when the cap voltage >X.

If you know the current, know the comparator voltage and know the time you can calc capacitance. The benefit of using a constant current is that it totally negates ESR and the only thing you are measuring is the storage, ie; the true capacitance.

I think you can calibrate a constant current source and voltage trigger point quite easily with a multimeter. Much easier than resistances that will depend on PCB tracks and soldering etc.

 

[dougy83]

Perhaps I misunderstood you, but there seems to be a flaw in what you said.

The benefit of using a constant current is that it totally negates ESR and the only thing you are measuring is the storage, ie; the true capacitance.

How does constant current negate ESR? The voltage across a cap will be Vc = Integral(i/C, dt) + i.R, where R is the ESR of the cap.

I think all you need is a measured constant current source, then hold the cap shorted with a PIC pin, then release the pin, start the timer and use the PIC comparator to detect when the cap voltage >X.

This means you need to have a stable voltage reference, X, as well as a stable current source. If you use precision resistors as the charge source and as a voltage divider to give the reference, there's no need to calibrate any voltages or currents.

I think you can calibrate a constant current source and voltage trigger point quite easily with a multimeter. Much easier than resistances that will depend on PCB tracks and soldering etc.

Any current (whether constant or just through a resistor) flowing through resistance will create a voltage drop.

 

[MrAl]

Hi,

The integral simplifies with a constant current to:
dv=i*dt/C
The initial charge period would give us:
V1=i*dt1/C+i*Resr
and the second charge period would give us:
V2=i*dt2/C+i*Resr
Subtracting V2-V1 we get:
V2-V1=i*dt2/C+i*Resr-(i*dt1/C+i*Resr)
or:
V2-V1=(dt2*i)/C-(dt1*i)/C
Solving for C:
C=((dt2-dt1)*i)/(V2-V1)
which is totally void of esr, except we do have to make two time measurements at two different voltages.

 

[Blueteeth]

There are starting references, see https://en.wikipedia.org/wiki/SI_base_unit for a few examples

In your attempt to remove the need for a reference capacitor, you've introduced the need for a reference resistor. You are also relying on a reference crystal oscillator.

The advantage I can see in using a resistor as the reference is the fact that it's much easier to get a precision resistor than it is to get a precision capacitor.

Thanks for the link, I shall study it this evening

I couldn't have put that better myself! Introducing the need for precision resistors, and a precision timing reference (crystal osc). That is exactly how I approached this, because as you said, precision resistors (0.1% 20ppm) are readily available (and can be cheap when farnell is getting rid of stock), and crystal oscillators regularly achieve +/-20ppm tolerance - where-as a <0.5% cap, can be pretty expensive, so its a trade off for a starting reference.

Roff, apologies for not answering your post previously, I guess you posted it as I was typing out mine. Thanks for the spice file! I'll load it up this evening. So you've stripped it down to just a comparator - good thinking, I seemed to just 'add' more parts (which can only really increase errors). Those errors look very good, even for a simulation (I was getting between -2% and +1.6% with all my above idea's in spice using actual part models, and 'ideal' resistors). And with a frequency output, makes a great 'add-on' to existing measurement equipment. I shall play with that ASC file later.

Lastly, thanks to all posters here. Sure its not the sort of straight-forward topic like 'I have this circuit and it doesn't work', so its more of a discussion, sharing idea's. I am grateful for peoples insights/idea's - the reason I come to the forum often, to learn

Blueteeth

 

[dougy83]

which is totally void of esr, except we do have to make two time measurements at two different voltages.

Sorry, you didn't have to write it all out for me - a simple "measure the slope by using 2 trigger points" (or equiv.) would have would've been all too clear to me Thanks for taking the time though ~~. The post I was referring to stated that only a single trigger point/voltage X was needed & that the timer would be started as soon as the cap began charging.

 

[MrAl]

Sorry, you didn't have to write it all out for me - a simple "measure the slope by using 2 trigger points" (or equiv.) would have would've been all too clear to me Thanks for taking the time though ~~. The post I was referring to stated that only a single trigger point/voltage X was needed & that the timer would be started as soon as the cap began charging.

Hi dougy,

Oh no problem, i like to write out the equations when i have the time just to make sure i have it right for myself too If i get to a result i didnt expect, i know i made a mistake and then go back over everything.

Constant current generation brings in its own problems too though. I took a quick look at regular charge and discharge but the esr in those terms enters as a linear factor which can not be eliminated like with the constant current where it enters as a constant additive term. In most cases however the esr will be insignificant compared to the normal charging resistor and after all it just adds to the time constant as C*(R+esr), so for normal values of R and normal values of esr we probably wont see a huge difference. Oh hey wait a minute, this assumes that Vc is the voltage across the CAPACITOR, not across the capacitor AND esr resistance which is what we would really be measuring...this requires looking into...


Next i guess we'll have to figure out how to measure the change in capacitance as voltage across the capacitor increases?

 

[dougy83]

As you've stated, the ESR is nothing compared to the equivalent charging resistor. For a 1K resistor, an awful ESR of 1 ohm, cap of 1u, a threshold at 2.5V, the error will be, what, ~300ns? ~0.04%

You could always just use an LC oscillator that has a natural frequency unaffected by the capacitor ESR... which is exactly what was in one of the original schematics.

 

[MrAl]

Hello again dougy,

Oh yes that would be interesting too.

It looks like another solution arises too, if we can drive the RC network with a sine wave of two different frequencies w1 and w2 and measure the response across the physical capacitor as V1 and V2 respectively and of course knowing R:

C^2=(2*sqrt((V1^2-1)*w2^2+(1-V2^2)*w1^2)*sqrt((V1^2-1)*V2^2*w2^2+(V1^2-V1^2*V2^2)*w1^2)+((V1^2-1)*V2^2+V1^2-1)*w2^2+((-V1^2-1)*V2^2+V1^2+1)*w1^2)/((V2^2-V1^2)*w1^2*w2^2*R^2)

(and C of course is the square root of the right hand side of above)

and this too is void of esr.

This is stretching the box a little bit though as we'd have to investigate the practicality of doing it that way.

That solution is a little involved but actually comes up quite naturally by simply solving the network equation for the ESR using two different frequencies (and this leads to two different voltages) and then equating the two ESR's and then solving for C, although it is simpler to solve for C^2 as above. There may be other simplifications to that equation as well.

LATER:
A better formula:
C2=(2*sqrt((v1^2-2*v1+1)*v2*W2^2+((1-v1)*v2^2+(-v1^2+2*v1-1)*v2+v1^2-v1)*W1*W2+(v1*v2^2-2*v1*v2+v1)*W1^2)+((v1-1)*v2+v1-1)*W2+((-v1-1)*v2+v1+1)*W1)/((v2-v1)*R^2*W1*W2)
where
v1=V1^2,
v2=V2^2,
W1=w1^2,
W2=w2^2,
then:
C=sqrt(C2)

 

[Roff]

Roff, apologies for not answering your post previously, I guess you posted it as I was typing out mine. Thanks for the spice file! I'll load it up this evening. So you've stripped it down to just a comparator - good thinking, I seemed to just 'add' more parts (which can only really increase errors). Those errors look very good, even for a simulation (I was getting between -2% and +1.6% with all my above idea's in spice using actual part models, and 'ideal' resistors). And with a frequency output, makes a great 'add-on' to existing measurement equipment. I shall play with that ASC file later.

Keep in mind that the resistors and capacitors in that sim are ideal. The errors were due to the comparator and the inverter, and whatever spice throws in.

 

[Roff]

Conceptually, another way to measure capacitance is to apply a ramp of voltage (constant dv/dt) and measure current. If you scale the slope judiciously, the current can be interpreted as picofarads, nanofarads, microfarads, etc.
I=C*dv/dt
C=I/(dv/dt)
For example, if you apply 10^6 V/sec (1V/usec), then the current will represent the capacitance in microfarads. The current can be scaled with a resistor, of course, to make everything convenient. Assuming the capacitance is not a function of voltage, the voltage will be a flat-topped pulse. The ESR will cause an exponential rise to that pulse, but a single measurement (or many, averaged after the ESR transient) will give the capacitance. The weakness here is leakage. Leakage will add the the C*dv/dt current, giving an error. That can be subtracted out by making another measurement after the ramp flattens out, and before it is reset.
I have used this scheme in simulations to plot C-V curves of diodes, etc. (think varicaps and varactors).
The weakness is in the need to generate a ramp with a precisely controlled slope. I can think of ways to do this, but they aren't simple.