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LTSpice error

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Venkat Raghav

New Member
while simulating circuit in LTS, it shows error log as, "Voltage source X and voltage source X1 are paralleled making an over-defined circuit matrix".
how to fix this????
guide me plss,,,
 

ericgibbs

Well-Known Member
Most Helpful Member
hi VR,
You could add some internal series resistance to the Voltage sources, I would try to avoid putting Vsources in parallel.
E
 

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