Continue to Site

Welcome to our site!

Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

  • Welcome to our site! Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

Logic Buffers using discrete components

Status
Not open for further replies.

samsunil

New Member
Hello,

If the digital output (LVCMOS 3V3) is heavily loaded , we may need to use buffer to meet Vih & Ioh (output high current) level of the receiver circuit.
I prefer not use the stand-alone Buffer IC's . Can anyone guide me to design my own buffer circuit based on Transistors ??

Thanks
Antony
 
I believe the component/configuration you're looking is an NPN low side switch. There are lots of examples if you do a google search.
 
If can tolerate about a 0.65V offset in the output levels, you could use a push-pull emitter follower circuit such as this:

upload_2017-7-31_10-45-1.png
 
If voltage loss is an issue, couldn't you just replace the BJTs in crustchow's circuit with the corresponding MOSFETs?

You could also take a FET version of crustchow's circuit, except reverse so the P-device on the high-side and the N-device is on the low side (basically making an inverter) and then cascade two of them. Four transistors seems a little decadent, but that might just be the price you pay for going with discretes.

According to this:
**broken link removed**
Losing 0.6V on the logic low could be problematic.
 
Last edited:
"Shouldn't be more than about 0.7V."

Not so.
The base-emitter drop is typically 0.6-0.7V.
Why do you say it is otherwise? o_O

Here's a simple LTspice simulation that shows no more than 0.6V:

upload_2017-7-31_13-8-19.png
 
If voltage loss is an issue, couldn't you just replace the BJTs in crustchow's circuit with the corresponding MOSFETs?

This may be a good solution with a 5V rail. But using 3.3V, the fet may not have an adequate Vgs threshold voltage to throw the mosfet into saturation. I did a little simulation of this with a 2n7002, single side only, and the Vds drop was worse than the equivalent Vce drop for a transistor.
 
What is the maximum frequency of the signal?
 
This may be a good solution with a 5V rail. But using 3.3V, the fet may not have an adequate Vgs threshold voltage to throw the mosfet into saturation. I did a little simulation of this with a 2n7002, single side only, and the Vds drop was worse than the equivalent Vce drop for a transistor.
Well of course it wouldn't work well with a 2N7002 since that's designed to work with a gate voltage of 5V. You would use a 3.3V gate MOSFET.
 
to design my own
it can be done but it must meet following
  • keep it's I/O specs. at your app. supply range
  • -- at the same time have it's threshold fn.of(Vdd,Vss) near SRC. tech.
  • have transition delay similar to your tech. e.g. LVCMOS
  • -- while having it's input impedance near SRC. tech. have it's output impedance much lesser (prefferredly matching the exact occasion)
  • perhaps more . . . (noise immunity) . . .
it may turn out that using off the shelf component weighs out the effort meeting all of the above
 
Status
Not open for further replies.

Latest threads

New Articles From Microcontroller Tips

Back
Top