Is this Application Report Wrong?

[spec]

I have been looking into back-flow protection for batteries and chargers and invented this wonderful circuit, and as usual when you search you find that it has all been done before. Just so in this case and the circuit in Figure #5 of the application report linked below, not only uses a similar approach, but is simpler. Or so I thought. Could you all have a look at the circuit and either confirm or disprove my analysis that the circuit is not only wrong, but allows gross back-flow into the charger. Have I missed something, because manufacture's application reports are normally sacrosanct.

spec

https://www.infineon.com/dgdl/Rever...2.pdf?fileId=db3a304412b407950112b41887722615

 

[ericgibbs]

hi spec,
Looks OK to me, where do you think the problem is.?
E

You should have gone to 'Spec-savers'!

 

[AnalogKid]

"
During reverse polarity of the battery, the diode in the ground line of the charge pump blocks the voltage. No voltage supplies the Gate...
"
Not-quite-clearly stated is that this circuit protects against a reverse-polarity *connection* only, not reverse current flow if the load has some energy storage capability and the battery terminal voltage is below that storage potential. For that you need source and load voltage monitors and a comparator driving the MOSFET. See Linear Technology for single-chip solutions.

ak

 

[MikeMl]

The circuit is intended to prevent any current flow if the battery polarity is reversed; not to stop reverse current flow if the charger voltage is a few mV less than the battery voltage...

 

[spec]

hi spec,
Looks OK to me, where do you think the problem is.?
E

You should have gone to 'Spec-savers'!

Like the joke.

Analysis not so good: did you put your Specsaver glasses on?

My issue with the circuit is: if the charger voltage goes to to zero volts (charger turned off), the PMOSFET drain will also go to zero volts and the source of the PMOSFET will still be at the battery voltage, say +12V. So the PMOSFET will be fully turned on in the normal forward direction. This will allow maximum current back-flow into the charger.

spec

 

[alec_t]

The Fig 5 solution works provided the load is passive. As noted above, if the load is a battery then reverse current can flow into a charger. Pity the App Note didn't mention that.

 

[spec]

"
During reverse polarity of the battery, the diode in the ground line of the charge pump blocks the voltage. No voltage supplies the Gate...
"
Not-quite-clearly stated is that this circuit protects against a reverse-polarity *connection* only, not reverse current flow if the load has some energy storage capability and the battery terminal voltage is below that storage potential. For that you need source and load voltage monitors and a comparator driving the MOSFET. See Linear Technology for single-chip solutions.

ak

The circuit is intended to prevent any current flow if the battery polarity is reversed; not to stop reverse current flow if the charger voltage is a few mV less than the battery voltage...

The Fig 5 solution works provided the load is passive. As noted above, if the load is a battery then reverse current can flow into a charger. Pity the App Note didn't mention that.

Thanks AG, Mike, and Alec

Got it.

I was expecting more of the application report circuit, but in that case, I have 'invented' a circuit to prevent both reverse battery and back-flow with a low voltage drop... I think

Maybe I will post that for comment.

Your observations are much appreciated.

spec

 

[Tony Stewart]

This is TI's solution for LiPo cells https://www.ti.com/lit/ds/symlink/bq2972.pdf

Note the Vss switch.

 

[ericgibbs]

Maybe I will post that for comment

hi spec,
Post when read, I could LTSpice sim it for you.
E

 

[spec]

Do you know I have been tearing my hair out trying to figure that application circuit of Fig 5. I knew the application report couldn't be wrong. It's nice to have some brains on the job.

It reminds me of the time when a lead water pipe stub fractured and I tried all sorts of ways to stop it leaking with no luck. Then a mate came around and said just cut the pipe through fold it over and bash it tight on a hard surface with a hammer. I did it in five minutes and the lead pipe stub never leaked for 25 years when it was finally removed.

spec

 

[MikeMl]

Here is an approach...
Llook at the first circuit. It is nothing more than a diode pointing from the charger to the battery under charge. With zero V from G to S, the body diode inside the PFET conducts when it is forward biased by more than ~0.5V (Vf for Si). I am modeling the battery as a 14V fixed voltage, and the charger as variable voltage from 10V to 15V with some resistance thrown in...

This connection of the PFET does a great job of preventing the battery from discharging backwards into the charger when the charger voltage is less than the battery voltage (<14.0V), but the charger has to be ~0.5V more positive than the battery before any current flows into the battery. The x-axis of the plot is the charging voltage V1. The green trace is the current in/out of the battery, while the red trace shows the power lost in M1.

I have added a behavioral control voltage B1 to the gate of the PFET. Think of B1 as being a circuit that contains a voltage comparitor, and a voltage limiter. B1 controls the voltage at the gate of the PFET based on the differential voltage V(d)-V(s). If it is negative, then B1 makes V(g)=V(s), leaving the channel of the PFET in the off state. If V(d)-V(s) is positive, then it makes V(g)=V(s)-10, making the channel conduct. Look at the simulation:

Note the blue trace, which shows the gate voltage. The modeled behavior has eliminated the forward drop of the body diode. Also note what happened to the power dissipation in the PFET (red trace).

I will leave it as an exercise for the student (Spec) to design up a circuit which will behave like B1....

 

[spec]

I will leave it as an exercise for the student (Spec) to design up a circuit which will behave like B1....

That is very generous of you. You are a bit behind the times the 'student' has already figured all that school-boy stuff (without simulators) and designed the circuit.

spec

 

[alec_t]

Just curious. Does the design resemble this?

 

[spec]

Just curious. Does the design resemble this?
View attachment 102125

Pretty close Alec- you have the essence of the problem.

Will post my two versions in a minute.

spec

 

[spec]

POST ISSUE: 02 0f 2016_11_07

An outline sketch for two low-loss back-flow blockers (LLBFBs) is below- it is only notional and has not been analyzed or optimized, neither has battery reversal been taken into account. That will be the next stage (suggestions appreciated).

The top circuit has the disadvantage that if the charger voltage drops below the battery voltage, but does not drop below the NMOSFET gate threshold voltage, back flow will result. If the charger voltage drops to zero though, no back-flow should result.

The precision version of the back-flow blocker does not have this problem (I hope).
The comparator is rail-to-rail input output (RRIO).

spec

 

[MikeMl]

You will have to check that the uPower comparitor has a common-mode input-range which includes its own Vdd. Most dont.

 

[spec]

You will have to check that the uPower comparitor has a common-mode input-range which includes its own Vdd. Most dont.

RRIO is stated in post #15.

Quite a few opamps/comparators are over the top input range these days Mike.

But if push cames to shove you can always use potential dividers on the +in and - input of the comparator.

spec

 

[AnalogKid]

I think both schematics in post #15 have issues. In the upper schematic, the right-side pass transistor might be in backwards. If you want to turn it on by pulling its gate down to GND, it should be in there as common source rather than source follower. This presents a backflow problem through the body diode, which is why the standard circuit for this has two FETs back-to-back. I might be wrong, because the part is drawn PMOS but marked NMOS, so the exact circuit function is not clear.

As a cross-check on the basic signal flows, substitute a PNP transistor in the drawing and see if things behave the way you want.

ak

 

[spec]

I think both schematics in post #15 have issues. In the upper schematic, the right-side pass transistor might be in backwards. If you want to turn it on by pulling its gate down to GND, it should be in there as common source rather than source follower. This presents a backflow problem through the body diode, which is why the standard circuit for this has two FETs back-to-back. I might be wrong, because the part is drawn PMOS but marked NMOS, so the exact circuit function is not clear.

As a cross-check on the basic signal flows, substitute a PNP transistor in the drawing and see if things behave the way you want.

ak

Hi AK,

You are right: the top POSFET, in the top circuit, should be labeled PMOSFET, not NMOSFET (typo), but otherwise the circuit is as intended.

This circuit is not a reverse blocking MOSFET switch (RBMS) which uses two identical MOSFETs connected in reverse series.

The difference is that the back flow blocker (BFB) is intended to behave like a perfect diode: no forward voltage drop and no reverse current flow. The BFB is not intended to simulate a single pole, single throw switch like a RBMS.

You mention about the PMOSFET being wired the wrong way around- that is intentional. To a first approximation MOFETs do not care what polarity the drain voltage is compared to the source voltage. They will conduct current in both directions, just like a resistor. To illustrate this you can connect a 6V, say, battery in the enhancement sense, across the gate/drain terminal of a MOSFET, and the MOSFET will quite happily conduct AC current between its source and drain.

By the way, keep the comments/suggestions cumming. The idea is to find a flaw in the circuits- if there is one that is.

spec

PS: Circuit of post# 15 corrected- thanks AK