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Is FET operating within SOA?....Pulsed linear regulator

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Flyback

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Hello,

We have the following waveform in the STD1NK80Z FET (DPAK). It recurs every 10ms as shown.
We need to know if this violates the SOA.
To me, these pulses equate to repetitive pulses of [45V and 430mA and 650us long].
How from the datasheet can we tell that this is acceptable?
The SOA graph on page 4 shows what’s acceptable for a “single pulse”……..but how are we supposed to know what’s ok for our pulse train?
Also, the SOA graph on page 4 says “Tj=150degC and Tc = 25degC”..
What does this mean?......surely it’s the junction temperature, Tj, that is the significant parameter, so why do they bother to specify that the case temperature, Tc, is at 25degc?

STD1NK80Z datasheet:
 

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  • Linear mode fet waveforms.jpg
    Linear mode fet waveforms.jpg
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To me, these pulses equate to repetitive pulses of [45V and 430mA and 650us long].
I can't see the current scale in your plot, so can't comment further on that.
The SOA graph on page 4 shows what’s acceptable for a “single pulse”……..but how are we supposed to know what’s ok for our pulse train?
Difficult to know for sure.
But for that low a pulse duty-cycle there's probably sufficient time for temperature to equalize in the transistor chip between pulses, so it can be considered a single pulse for SOA purposes.
Also, the SOA graph on page 4 says “Tj=150degC and Tc = 25degC”..
What does this mean?......surely it’s the junction temperature, Tj, that is the significant parameter, so why do they bother to specify that the case temperature, Tc, is at 25degc?
Likely to show that the device is operating at it's maximum (worst-case) power dissipation.
At a lower power dissipation, the SOA rating would be higher since the SOA rating is limited by local heating on the chip.
 
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