For balckbunny!
Arrow shows the path that current flows. In the last picture in shadymans if you connect a resistor to the collector to VDD + & take the output from the collector to another IC.
When the transistor in OFF condition there’s no current flows through the collector to emitter. So you can see the logic HIGH in the collector output.
If the transistor ON then the current flows through the collector to emitter. So the logic at collector can determine to LOW mostly the voltage between collector and emitter falls to 0.7V or less.
This can see vise versa if you take signal from the emitter output to the next IC.