I have a bootstrap circuit which feeds power to an IC. The IC then shuts it down and allows a buck to take over at the same point that the main load is enabled. When no power is detected for a period of time it goes into sleep and switches off the main bus.
To get sleep draw as low as possible I was intending to away with a comparator on the wake input (see schematic), but this will mean dealing with a large skew, and I'm wondering if IC's like PIC's have trouble detecting this as a digital signal (voltage is above required but edge detection won't see it)?
To get sleep draw as low as possible I was intending to away with a comparator on the wake input (see schematic), but this will mean dealing with a large skew, and I'm wondering if IC's like PIC's have trouble detecting this as a digital signal (voltage is above required but edge detection won't see it)?