There are many ways to connect a power FET switch to optoisolator. "0" or "1" in and "0" or 1" out and both input and output may be low side switch or high side switch depending how you define specs for Input hi,lo and power down on primary side and secondary ground switch or power switch depends on current rating . The Opto is a current transfer ratio (CTR) of 50% typ over temperature range (40% min) to 100% min (25'C) on 4N35 . THis means output current is not less than input current = 100% but very low current. 10mA typ.
. So Rs in series for input current, Ii= V(Rs)/Rs = (Vdd-Vf(LED-Vo(CMOS))/Rs = 10mA typically used CMOS driver can be hi or low then LED is tied cathode low or Anode high respectively with series Rs to limit current.
Rs tends to be selected for 3.3V supplies around Vs(Rs)=2V/10mA = 200 Ohms +/-10% so 180~ 220 Ohms is OK if you know worst case temp and tolerances.
Outputs are floating collector-emitter , which for a power switch is best to use a MOSFET and for high side switch, one uses an Pch MOSFET with sufficiently low RdsON. If using 4V threshold switch then must be >=12V and < 30V so 24V is OK. then Gate must have a pull down to ground R to turn ON with no input power , or if you prefer pullup R to 24V to gate to keep off when no source current is applied, then the Collector drives the Gate to ground for 24V Vgs and xx mOhm across switch to load.
If Pull R is used, then Collector can only sink 40% to 100% (25'C) of input 10mA so using 4mA max @ 24V = 6K ohm pullup. to say 10k Ohm. Then both C-E wires go to remote Gate FET and RTN or 0V of remote 24V supply with 6~10k between Pch Gate and Drain to 24V+ with Source going to load with some protection as required by EMI transients or load cap if hard wired.
Using twisted pairs gives better Noise immunity and grounds are not shared.
There are many ways to change wiring depending on logical function , positive or negative logic. (inverted)
THis is just one example.