Continue to Site

Welcome to our site!

Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

  • Welcome to our site! Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

How long does it take...

Status
Not open for further replies.

Emil09

New Member
...for a logic gate to perform it's operation? I did an experiment whereby an input pulse was applied to a circuit with 6 logic gates and the output was produced in 45 ns. Can I infer from this that a single logic gate takes 45/6 = 7.5 ns to operate? Is this always true?

Just for fun, here is the oscilloscope printout:

**broken link removed**
 
Roughly yes, but output loading can change result, like PCB layout capacitance and inductance.
 
No. Depends on the logic gate itself and the test circuit it's hooked to. If you're asking if you can trust that that logic gate will always read that particular delay that should be true but it's always best to err on the side of caution with such things.
 
Last edited:
Every logic family (TTL, CMOS, ECL, etc) has its own characteristic "gate delay". You have to look at the data sheet for each specific gate/flipflop for each logic family to know what to expect.
 
In most databooks, the specification you're looking for is "propagation delay" and is usually found under "Switching Characteristics". The spec is usually given for a couple of different loading characteristics. If you can't quickly find the spec, go down the far-right column marked "Units" and hunt for the lines with "ns". For gates, that's about the only spec in ns. For clocked logic such as flip flops, counters and shift registers, ns is also used for things like minimum pulse width, maximum rise time, data setup and hold times and release time under "Recommended Operating Conditions" and all kinds of propagation delay specs under "Switching Characteristics".

A related specification that I used to see all the time and don't see anymore is that of the maximum risetime and falltime of the clock waveform of clocked logic. To me, it's an important specification, especially if you're interfacing digital logic to some slower analog circuits. If the risetime of a clock waveform is too slow, standard edge-triggered logic won't even "see" it. It takes Schmitt trigger inputs to resolve the slower edges.

By the way, when using the scope to measure the propagation delay, measure the time at the 50% point of BOTH waveforms -- i.e., center the waveforms on the graticule and measure at the horizontal centerline. Many digital scopes may have a time measurement function available for comparing two pulse waveforms. With others, you may have to use cursors positioned at the centerpoints to make the time measurement. Analog scopes are a lot faster to use. (That last opinion provided as a free service.)
 
Last edited:
Status
Not open for further replies.

Latest threads

New Articles From Microcontroller Tips

Back
Top