Can anyone explain how does the non-overlapping clock works? I am designing a Switched Capacitor Filter and I understand that I have to cascade the non-overlapping clock together. I have attached a picture of the non-overlapping clock. Thanks! I am relatively a newbie in this field.
The non-overlapping clock is generated by a cross-coupled latch with a delay in the cross-coupling due to the propagation delay of the inverters in series in each of the cross-coupled paths. This delay assures that the one clock phase goes low before the other one goes high, hence the to clocks are non-overlapping.
Non-overlapping clocks are used to ensure that different paths of the circuit are not on at the same time. A short circuit condition could otherwise occur.
This is particularly important in power switching circuits to prevent high current 'shoot through' spikes that would happen if two series power switches were on at the same time, even if the overlap time was only for a few microSeconds.