Continue to Site

Welcome to our site!

Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

  • Welcome to our site! Electro Tech is an online community (with over 170,000 members) who enjoy talking about and building electronic circuits, projects and gadgets. To participate you need to register. Registration is free. Click here to register now.

Help with designing 8-bit ADC

Status
Not open for further replies.

sevenayan

New Member
Hi guys, first post here. Kinda desperate here, as I've done so much reading and I've yet to figure it out.
I have to build an 8-bit ADC converter using successive approximation method. But the kicker here is that I do not have a strong background in electronics (And I haven't even taken digital electronics). Long story short I've been forced to take this class without having the necessary requirements. Anyway, as I said, 8bit SAR ADC. I've looked at countless block diagrams, and I know how to do the integrator and the comparator. A counter will be an IC, so that won't be an issue. But my issue is actually designing a full circuit for the thing. Excuse the somewhat silly question, but what is control logic and how does someone simulate it? I can't use an IC or microcontroller, the only ICs I'm allowed to use are for the op amp and the counter (and if I use DACs, which is not mandatory). Does anyone have a full circuit for it, and not a block diagram? It would help if I'd at least have something infront of me that I could build and then try to understand. Looking at SAR ADC IC datasheets, most use other ADC ICs, and as I said, that's not allowed for me. (i.e: https://www.electro-tech-online.com/custompdfs/2013/04/MAX11120-MAX11128.pdf )

Ryan
 
what is control logic and how does someone simulate it? I can't use an IC or microcontroller, the only ICs I'm allowed to use are for the op amp and the counter (and if I use DACs, which is not mandatory)
Control logic is such things as AND gates, OR gates and Data Latches. Aren't you allowed ICs for the control logic?
As for simulation, LTspice is a free download from Linear Technology and various third-party simulation models for it are available free from the Yahoo LTspice user-group.
 
Ryan, is the counter you are referring to the one that keeps track of which bit of the 8 bits you are converting?

Are you allowed to use an IC 8bit DAC as part of your design?
 
Control logic is such things as AND gates, OR gates and Data Latches. Aren't you allowed ICs for the control logic?
As for simulation, LTspice is a free download from Linear Technology and various third-party simulation models for it are available free from the Yahoo LTspice user-group.

Thank you for your reply. I've just checked, and I'm allowed to use logic gate ICs
 
Ryan, is the counter you are referring to the one that keeps track of which bit of the 8 bits you are converting?

Are you allowed to use an IC 8bit DAC as part of your design?

Hi,

Yes that is the counter that i'll be using. As for the DAC, preferably not. The thing is that this is an electronics lab, and the less ICs used, the better.
 
Last edited:
Hi everyone,

Can someone please explain what should be done for the control logic for a dual slope 8bit ADC? My professor told me to change to a dual slope method instead of successive approximation.
 
Have you tried googling 'dual slope adc schematic'?
 
Have you tried googling 'dual slope adc schematic'?

Hi alec,

Yes I have. I've done a lot of research on it. The analog part is ok. My problem is the digital dection. As I stated earlier, I have no background in digital electronics, and even after reading so much, I can't seem to understand the control logic. What I've read gives a general outline of what should happen, but my problem is that I can't figure out how to make it happen. Any help would be greatly appreciated. T
Thank you

Ryan
 
I suggest you start by writing down the exact sequence of events which the dual-slope method must follow. That will dictate the control logic functions needed. Knowing those will enable the logic ICs to be selected.
 
@Simulation.
I would recommend the Falstad analog circuit simulator along with LTspice. LTspice is far far more accurate to reality, but it is not as intuitive to use. The work flow is broken up into, build, simulate, analyze, and is very hotkey centric. The new comer to electronics might feel overwhelmed by it. The falstad simulator is far less accurate, don't trust what you simulate to actually work as advertised every time, but it is way quicker and much more "hands on". With the falstad sim, you get indicators on the actually schematic, as well as real-time simulation and editing. Much better for "Oh! I get it now" moments.

Again, I can not stress enough that you should use both of these sims in conjunction with each other. You can not rely on the falstad sim alone as it's not accurate by any stretch of the imagination. And LTspice can get quite daunting at times. I personally build a circuit or circuit block in falstad sim, then build it again in LTspice till both sims agree. Then move on to building the real circuit and getting them all to agree.

Also note that the Falstad simulator runs in a web browser, as a Java applet. You must have Java enabled, and as I have found out, you must also be running Google Chrome, or Firefox for it to work fully. Internet Exploder has errors I guess.

@DAC
An R2R ladder is an easy DAC to build on an individual parts basis. here is a schematic of that...

R2R ladder.png

And here is a simulation... *CLICK-ME*

Notes:
(1)The MOSFET's in the falstad simulator have the symbol backwards from the accepted standard. The arrow is supposed to point toward the current it is blocking. This turns away a lot of pro circuit designers from the otherwise useful sim as it's totally wrong. Keep this in mind when you are using it, virtually every one else will use the right convention, with arrow pointing toward the most positive voltage.

(2)The MOSFET's are just used here as constant current sources, with a bias voltage applied across all their gates uniformly. In real life, the voltage will almost certainly be different than shown, and will probably be VERY sensitive.

(3)The square-wave sources at the bottom are just a cheater way to simulate an 8bit binary counter in the falstad sim, it is counting down LSb on the left, using inverted logic. It may look odd but under a microscope it works exactly as it should.

(4)The voltage can be adjusted at the top left. There is no particular reason that it is 10V in the sim. That's just what ended up happening. More importantly, the output voltage will never drop below ~2 volts. I have it adjusted this way because there is distortion below this point. This will scale with the input voltage, so be careful when adjusting it. Better current sources will help with this, but I designed this DAC to be "simple".

@Comparitor.
To do an SAR ADC, you will need a comparator. Here is a simple schematic for that using BJT's...

Comp.png

And here is a simulation... *CLICK ME*

Notes:
(1)The only resistor in that circuit can let you adjust the sensitivity verses the power the circuit consumes. Lower resistance means more power, higher means less sensitive.

(2)You can easily make the input voltage 10 volts if you want. the output will be 10 volts if you do this though. The two inputs don't care.

(3)You should have resistors on the two inputs in a real circuit. That is just the base simulation of the over all concept for the part.

(4) This circuit is the triangle thing in the Wikipedia articles block diagram. But do not confuse it with an Operational amplifier, which has the exact same symbol.

@Sample and hold.
A sample and hold circuit is simply a switch to a capacitor, fed into an operational amplifier. There are hundreds of schematics on the net for this, and I will provide one here. I will show the circuit with the Op-Amp in it's usual block form, it is up to you to understand what that means and obtain one yourself.

In any case, here is a sample and hold schematic...

Sample and Hold.png

and here is a simulation... *CLICK ME*

Notes:
(1)The triangle thing is an Operational Amp, NOT a comparator.

(2)The input voltage can be adjusted with the slider on the right of the sim, cleverly labeled "Voltage"

(3) The power wires are not shown in the simulation, and in most schematics of op-amps and comps. This is because it is globally understood that such things need power.

Successive Approximation Register (SAR).
This part is where I can't help you. As I understand, an SAR ADC uses the "divide and conquer" strategy to figure out the input voltage over a series of educated guesses. I understand that this means starting at 128 on the DAC, then comparing this to the input with the comp. If the DAC voltage is higher than the input, then the next number the SAR should produce is half of 128, or 64. If it is lower, then the number would be half added to 128, or 192. This process of divide the known voltage in half is repeated the number of times the ADC resolution is good for, each time closing in on the actual voltage more and more accurately.

The reason I can't help you here, is because I have no freaking clue how the actual logic of the register would be arranged to do this. Obviously the input is just the output of the comp. So it only has one input, either high or low. I would also imagine it has some kind of clocking mechanism, probably in sync with the sample and hold input switch. But beyond that, I can't imagine it.

It's probably some kind of shift-register, and some combinational logic that takes each bit as an input and produces an output for the DAC. How? I don't know. Hopefully someone else will chime in on this for both of us.



EDIT: I forgot to mention. Almost all of the above assumes perfect parts, exactly matched to each other. At many points, especially in the R2R ladder, if your parts are off by even 1%, you will run into serious problems with reconstruction accuracy. At a desired resolution of 256 bits, the preferred matching of all parts would be 2X the resolution, or 0.2% parts tolerance. This will be almost impossible to buy, but it's not impossible to do. If you buy excess 1% tolerant parts, you can then match them by hand with accurate measuring equipment to achieve even higher precision. Again, the most important thing this would be needed for is the R2R DAC. The resistors and the MOSFET's threshold voltages. Using a different constant current source, other than the MOSFET's would be a better choice than trying to match them. I just did it the way I did because it was easy to simulate.
 
Last edited:
Status
Not open for further replies.

Latest threads

New Articles From Microcontroller Tips

Back
Top