FSM/FPGA design problem...help please!

[bsodmike]

ello there!

I'm new to FPGAs but I'm wondering how one would treat this problem.

There are two buttons as input and each one has a corresponding output say SWA/SWB and LEDA/LEDB.

Basically if SWA is pushed, LEDA should be 'latched' until the system is reset. Same for SWB which would latch LEDB.

Now here's the tricky bit - if both are pushed simultaneoulsy then we 'toggle' between LEDA and LEDB for each successive simultaneous pushes.

Does one treat this like an F.S.M. problem, with Mealy model? I tried doing a state table/state diagram and hit a brick wall with the latching part.

I have come up with a design that involves simple logic but I'm wondering if there is a much better way of doing this. The way I set about it is how a caveman would - no proper planning and thinking how this would work...

So any help in solving this to give:

state diag
state table
expanded state table
minimization
final system diag

Thanks a lot!

Mike