If you look at the PDCx value, you will notice that the number of bits set is the same as the resolution. I.E. 0x3fff = 11 1111 1111 = 10 bits set. This is the value that the counter resets at and so the max PWM value is the same as this max value. However, because the counter is being clocked at a certain frequency then the frequency drops as the value of PDC increases. E.G. at 10MHz and PDC value of 0x1ff (512 steps) the frequency is 10,000,000/512 = 19.5kHz - at 20MHz = 39.1 etc.
Mike.