True enough, I thought it was a lowpass, apparently it's just a Nyquist limit of the sampling clock (at least on AVR, I think PICs are roughly the same) On a slow ADC clock in the MHZ range the sample and hold signal will average out to zero depending on the signal impedance and the sample and hold capacitor, effectively it will act as a lowpass with aliasing effects, this can be increased by adding more resistance to the I/O pin. Again it all depends on the amplitude of the imposed AC signal compared to the DC range required, and the sampling rate desired.