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Embedded system with 250+ IO?

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OK, I now think (but still not sure) that you want to test a cable loom for continuity. Is that shorts between conductors, connections from one end to the other, something else?

Mike.
Yes, if you put conductor between pin 1 & pin 2 but not pin 3, result should be 1=2; 2=1; 3=0 - most basic example.

A bit advanced version would probably need to read analog input voltage in cases where diode or resistor is present.
 
Like what? The one I pointed to has a bit for each pin to make I or O and also a bit to invert the logic. Some expanders have pins that are both I & O at the same time and that can be hard to understand.
If I remember right, there was limit of how many I2C devices you can put on network & it didn't make up to 250+ connections, and SPI/Serial was for whatever reason not widely available. It may be completely different now, that was good 5-6 years or more ago..
 
At the same time? Both in and out? Explain.
It is open collector (more or less) with a very week pull up. So from the compute side you can write a 1 or a 0. But to read you need to set that output to 1 and let the thing you are looking at pull down.
 
The IO expander I pointed to is limited to 128 pins/bus.
Last time I did a large LED display I used shift registers and in a matrix. I think the matrix was 8x? so each LED is only powered 1/8 of the time.
 
Just a though. Here is a IC that drives 64 LEDs. I have seen boards with two of these and 128 LED on one board and then you can chain many boards together.
1626277476906.png
 
This sounds like analog-style circuitry vs what Dana has suggested (more of a modern IC solution).

I'm interested in both - one is a bit difficult to read from text, a schematic would probably be easier to understand the logic.

Modern MCU is unlikely to have ~250 GPIO's, therefore would you (Dana) suggest multiple MCU's in this case?

Edit: quick search returns STM32F730I8 as potential option as it has 138 GPIO's, so two of them would be enough.

My first instinct would be an FPGA with ARM core. That way you could 1) Get the pin count needed 2) Do the SR
in HW fabric with unattended CPU access (if application is sourcing bit stream real time) 3) Get speed unconstrained
by SW 4) Single chip solution. But if you need analog on pins as well then I would reach for a PSOC, although I do
not know if it would route to 64 bits with its internal analog mux capability and route the digital side as well. I did a digital
only 64 bit SIPO, limit of their max package, but routing all the internal analog on top of that might challenge their fabric,
total highways available.

If you had analog available what would you do with analog state on pins ? Measure with A/D or....,
use comparators to inspect pins....?....

FPGA would also give you flexibility with project design changes. Of course the package likely BGA....and very little, if any,
analog....

Regards, Dana.
 
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You need to explain that. Or is it simply OC?
Some (most) IO expanders can be set to OUT or INPUT.
Here is how old IO expanders work. There is no bit to set to make a pin an output. It is not quite like Open Collector but close. (much like the old 8051 IO) P0 to P7 are the IO pins. There is a MOSFET that pulls down hard but the top MOSFET can only pull at <100uA. So it is much like a Open Collector with week pull up resistor. To make a port a "input" you need to set the pin to 1.
1626300128322.png
 
My first instinct would be an FPGA with ARM core. That way you could 1) Get the pin count needed 2) Do the SR
in HW fabric with unattended CPU access (if application is sourcing bit stream real time) 3) Get speed unconstrained
by SW 4) Single chip solution. But if you need analog on pins as well then I would reach for a PSOC, although I do
not know if it would route to 64 bits with its internal analog mux capability and route the digital side as well. I did a digital
only 64 bit SIPO, limit of their max package, but routing all the internal analog on top of that might challenge their fabric,
total highways available.

If you had analog available what would you do with analog state on pins ? Measure with A/D or....,
use comparators to inspect pins....?....

FPGA would also give you flexibility with project design changes. Of course the package likely BGA....and very little, if any,
analog....

Regards, Dana.
Thanks Dana,

I am not particularly familiar with FPGA's. To my understanding it would be fine if there's one cable harness to test, so you can set up FPGA in a way that it has information to check continuity and if it faces issue it then i.e. lights up red LED, notifying user of error. But I'd really like to have display interface (at the moment working with TouchGFX & STM micros) so would prefer display to handle the input from user end. Had a quick look at FPGA's and they don't seem to have communications at all? Hence my suggested micro which if used two, would be sufficient. Obviously it would not cover resistors and diodes cases, but surely I would be able to learn something from the project.

I think for diodes and resistors it would have to be some sort of clever ADC/DAC combination?
 
FPGAs are broadly capable of serial thru ethernet COM, and have LCD display
controller library fabric as well. But learning curve is a bit challenged if you have
never done FPGA work before as tools excellent, but quite deep in capability. And
you are responsible for timing, routing......

Sounds like your two micro quite appropriate. Its too bad the PSOC does not have
a large pinout as you get all the analog + digital you would need. In your case you
will have to build a large analog mux array external.

Yes on ADC and DAC, as you want analog measurements and I gather want to force
test voltages.

Regards, Dana.
 
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If you do plan on analog as well I was able to get this PSOC to route to 48
analog channels. Mux feeds 12 bit SAR. Note IDAC also can be used to force
current out of pin for force-test pin status. IDAC can be either source or sink
under program control.

Also used was a I2C slave component to transmit to your host CPUs. Note in
PSOC land a component is an onchip resource.

Design is single chip. I tried 64 channels but would not route. You might be able
to do 50+ channels, you would have to try it out. I also did not try PSOC 6 (this is
a 5LP example), which has more pins, you could try that as well.

So this would save a lot of chips, eg. many external analog muxes the alternative as well
as DAC and ADC chips you would need with your current approach.

If you decided not to use the ST parts keep in mind this chip can enable both analog
and digital on the same pin. So 5 5LP chips would do everything I think for 240 channels.
Keeping in mind 1 of the 5 could also manage possibly a SPI based LCD controller and
there are many more resources still unused on the 5LP chips like timers/counters/logic/lut/pwm......

Just a thought....

1626352922205.png


Regards, Dana.
 
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If I remember right, there was limit of how many I2C devices you can put on network & it didn't make up to 250+ connections, and SPI/Serial was for whatever reason not widely available. It may be completely different now, that was good 5-6 years or more ago..
There are I2C controlled I2C bus multiplexers, such as TI's TCA9548A.

If your end mux has 8 I/O pins, and 8 possible addresses, that gives you 64 I/O pins per block.

Using the TCA9548 (or equal) would give you 8 64 pin blocks for 512 individually addressable I/O pins.

If your end mux has 16 I/O's with 8 addresses, such as the PCF8575, then this scheme would give you 1024 I/O pins.
 
So I was looking deeper into potentially using the STM32F730I8 micro and got a bit lost about it's GPIO's.

The datasheet says:
1629104018729.png

As the input or output can have either pull-up or pull-down or even no resistor at all, is there any benefit from adding one, especially when same input will be input and output at some point of the test program? I might have read too much various information and started to get lost now..
 
So I was looking deeper into potentially using the STM32F730I8 micro and got a bit lost about it's GPIO's.

The datasheet says:
View attachment 133168
As the input or output can have either pull-up or pull-down or even no resistor at all, is there any benefit from adding one, especially when same input will be input and output at some point of the test program? I might have read too much various information and started to get lost now..
The only benefit of adding one is if you need a completely different value, but usually the value isn't important at all, so just use the internal ones.
 
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