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Effect of feedback on transistor input impedance

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throbscottle

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Probably going a bit over my head here, but I read a very long time ago a circuit description (in the Babini book "how to build your own solid state oscilloscope") where feedback to the scope's input transistor (a jfet) caused its gate to "appear" to have a very high impedance.

Sorry I don't have a schematic.

It's something that's always hung around in the back of my mind and never been properly processed - by what mechanism does feedback affect the input impedance?

(the 'scope worked really well, btw, though I no longer have it or the book)
 
It depends upon the type of feedback. If it consists of negative feedback from a resistor to the input, then it would reduce the input impedance. If it consists of a resistor in series with the source lead, then it would tend to increase the input impedance.
 
This is from National application notes.
If the bottom .1uf cap was removed. The input impedance is (10M + 2.2M//1M).
With the .1uf cap; the same signal fed into the amplifier is also fed into the point where these three resistor meat. That way both ends of the 10M resistor see the same signal. With no voltage drop across the 10M resistor the input impedance is very high.

Ultra-High-Input-Impedance-AC-Unity-Gain-Amplifier.gif

Is this what you are looking for?
 
Could well be what I was looking for. I think the explanation in the book was similar but I didn't understand it at the time, and that was (oh my goodness) 30 years ago! And I haven't seen it since then so it's from a very old memory.

Anyway it makes sense now, so thanks!
 
Could well be what I was looking for. I think the explanation in the book was similar but I didn't understand it at the time, and that was (oh my goodness) 30 years ago! And I haven't seen it since then so it's from a very old memory.

Anyway it makes sense now, so thanks!

You're perhaps confusing yourself by using the term 'feedback'?, it's more correctly (and less generically) called 'bootstrapping' - and one of it's major uses is to increase input impedance.
 
Note that bootstrapping increases impedance (for AC signals). It does not increase the DC resistance.
 
Ahhhh! Ok! I have come across this term before, however I don't think it was used in my book. Love it when things come together like that :) thanks folks :)
 
That way both ends of the 10M resistor see the same signal. With no voltage drop across the 10M resistor the input impedance is very high.
View attachment 82602

The signal seen at the emitter of the 2N3644, vis-a-vis the input signal, isn't it somewhat out of phase? If so, how does it plays into this?
 
The signal seen at the emitter of the 2N3644, vis-a-vis the input signal, isn't it somewhat out of phase? If so, how does it plays into this?

My only concern if the capacitor from the drain of the FET? - what's that there for?.

The source and emitter followers will keep the phase identical for the bootstrapping, but connecting the drain to the output seems bizarre?.
 
connecting the drain to the output seems bizarre?
Not really. It's another bootstrap which results in the drain voltage swing being in phase with the gate input, so effectively reduces the drain-gate capacitance.
 
Not really. It's another bootstrap which results in the drain voltage swing being in phase with the gate input, so effectively reduces the drain-gate capacitance.
Oh I see - and it works because the FET is a source follower.

So, is the same technique relevant for a bipolar input transistor?
 
work with....transistor?

yes...... but the JFET uses 1/10 the current to start out with.

1/10 is a phrase meaning "less than" and not to be taken literately.
 
Yes, it works for a bjt too.
 
So I wonder how old this technique is then? Back to thermionic days presumably.
 
Posts 3 and 8 show the circuit of a high input impedance amplifier.
The actual text from the application note AN-32 of february 1970 says;
"Nothing is left to chance in reducing input capacitance. The 2N 4416 , which has low capacitance in the first place, is operated as a source follower with bootstrapped gate bias resistor and drain. Any input capacitance you get with this circuit is due to poor layout techniques".
Zin>100 megohm
Cin < 25 pF.

Note the gain is 1 at the source AND the drain due to the two 10k resistors. BOTH the drain AND the gate bias resistor is bootstrapped. The leading current into the drain, applies a bootstrapping current to reduce the effect of the gate to drain capacitance.
 
Hi,

I like the National link in this thread, but this idea is even simpler than that and also works with DC.

A simple example was say we have a 1 ohm (yes very low) input resistor in series with the input and we are measuring a 1 volt signal, and say the other end of the resistor goes to a low voltage near zero. That means with the 1v signal and 1 ohm resistor the measuring circuit would draw a full 1 amp because the input resistance (impedance) is 1 ohm.

But now pump the other end of the resistor up to 0.9 volts to make the same measurement. Now we have the 1v input minus the 0.9v bias so there's only 0.1v across the 1 ohm input resistor, so that is now only 0.1 amp when before it was 1 amp. So now the voltage being measured (1v) only sees a 0.1 amp current being drawn from it, so it appears to the 1v source as though it were feeding a 10 ohm resistor now because 1/10 equals 0.1 amps. So we've managed to increase the input resistance to 10 ohms using a 1 ohm resistor, and the increase of the "bias" from 0v to 0.9v comes from positive feedback.

But why stop there. Increasing the bias to 0.99v, we see only 0.01v drop across the resistor, thus the input resistance now looks like 100 ohms. Taking this farther, increasing the bias to 0.999999 volts and the input resistance then looks like 1 megohm, when we still have that 1 ohm resistor in series with the input.

The "bias" comes from linear positive feedback that is a portion of the measured value. With a 2v DC input test signal the bias would be automatically adjusted for twice the value it was with a 1v DC input. So with a 2v input the bias would end up being 1.999998 volts which would leave 0.000002v across the 1 ohm resistor which means 2ua current which means again 1 megohm apparent input resistance.

There's a slight catch here in that it takes a small amount of time for the feedback to react to the new input signal, so we would not really want to use a 1 ohm resistor but something much higher to start with.
Note also that we do not need infinite input impedance we just usually need it to be very high.

The simplest example of this is an op amp circuit with positive feedback. The positive feedback is always kept less than the input so it does not oscillate.
We also end up with a slight error in the measured value but it can be kept low or compensated for in other ways.
 
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I wondered if that was the case, Mr Al. Very good of you to lay it out so clearly though, thank you. I see that knowing the amount of feedback allows you to calculate the impedance.

Now my next question is, and something else that has always looked like a Dark Art to me, I know there are several types of feedback (current, voltage, series, parallel), but supposing I have for a very simple example an amp with 3 bipolar transistors (I'll stick with those because I understand them better) common emitter, biased very boringly with a p.d. to the base, and say I want it to have a closed loop gain of 100, how do I work out the value of a resistor taking negative feedback from the collector of the third tranny to the base of the first? Or supposing I have only one transistor, and I want a gain of 10, I can bias it with a resistor from collector to base, but how do I work out the value to get the required gain?

I'm assuming from the principle you explained above it will decrease the input impedance in this arrangement.

It's just one of those things I never understood, mainly because it gets very mathematical very quickly (and I only do slightly mathematical, sorry!)

Looking forward to replies :)
 
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