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drift issue in capacitance measurement, why?

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Chengjun Li

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Hi everyone,
Please be patient allowing me to introduce the problem shortly.

I bought an evaluation board from a Japanese company recently. The board is used to measure very small capacitance difference by transfer input capacitance difference to output voltage, the resolution can reach 0.1fF. The board has three channels (X,Y,Z), and it can measure three capacitor pairs at the same time.

**broken link removed**

The working principle of the evaluation board is a Capacitance/Voltage conversion circuit shown below(X channel as an example).

**broken link removed**

SI terminal maintains at 2.5V. XP and XN are powered by square wave. Initially, XP is connected to 5V, XN is connected to GND, S is turned on, Cp and Cn are charged. Then, XP switched to GND, XN switched to 5V, at the same time, S is turned off. This way, the difference charges stored on Cp and Cn are transferred to CFB, the voltage across CFB is

V = (Cp – Cn) *5 / CFB


In the actual board, the circuit is added with a bootstrapping structure.
**broken link removed**

The board also has some internal registers which can adjust the gain, offset and compensate for temperature change.


To test the board, I first connected the board to no external capacitor and measured the output voltage over a certain period of time( I only use X and Y channel). I found the output voltage is always stable over several hours.

**broken link removed**

Then, I connected the board to dummy capacitor pairs(capacitance of each capacitor is around 10pF).

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The day I soldered the dummy capacitor on the board, the result I got is not stable.

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I changed nothing and tested it again in the next day, the result became stable.

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The third day the result is also stable.


Although I don’t know why the result in the first day is not stable, I think the board works fine based on the day 2 and day 3 results.


The next test I did is to connect the board to a DIP socket using copper wire, and placed the dummy capacitor on the socket(only X channel this time).


**broken link removed**

I placed the setup in an oven in order to have a stable environment and connected the oven to ground to make it serve like a faraday cage.

**broken link removed**

The results I got for three times test are very bad.

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I don’t know what happened? I would be very grateful if anyone can give me some suggestion.


One thing I think I need to mention is the bad result seems have no laws, but sometimes I got the result with period. Like shown below.

**broken link removed**
 
Changes in humidity? Changing barometric pressure? Air movement? I can't think of much else...
 
What is the tempco for OpAmp Vio? Or do you have specs for EVA?
What are part numbers andor values for Cn, Cp, Cfb?
What is Square wave freq and details of ADC timing ? Ceramic is very sensitive to V,T,vibe etc. and dielectric absorption. Try plastic caps.


Cap leads are pretty long and exposed to radiated noise like switching Weller soldering iron, Env. chamber relays, RF from long cable... etc.

There is an explanation for every event, if you dig deeper., shield, inject noise radiated nearby etc, the bootstrapped input may be very high impedance and amplify stray noise.

It is very important you document all the variables for each experiment, like temp, C values, P/N. etc.

Who makes the EVA board?

The chamber is not a perfect Faraday Cage as your I/O cable and DC Pwr cable can radiate noise inside. either diff. mode or common mode or both.
 
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I would like to see what are the results if you change the capacitors under test, close the oven, wait for 24 hours and THEN, not before, you start measuring.

From all physical variables, temperature is likely the one most affected by direct manipulation.

I was surprised by the ritual and long periods used to measure voltage references. Why not here?
 
One thing that comes to mind, have you cleaned all the flux residue from around the solder joints where the test capacitors are attached to the evaluation board?
Also on the extender board with the DIP socket?

If not, I suggest that you try cleaning them with iso-propyl alcohol or something similar.

JimB
 
Changes in humidity? Changing barometric pressure? Air movement? I can't think of much else...
Yes, those might be the factors causing the drift. But I think putting the setup in a chamber should eliminate these factors. But I can still see the drift.
 
What is the tempco for OpAmp Vio? Or do you have specs for EVA?
What are part numbers andor values for Cn, Cp, Cfb?
What is Square wave freq and details of ADC timing ? Ceramic is very sensitive to V,T,vibe etc. and dielectric absorption. Try plastic caps.


Cap leads are pretty long and exposed to radiated noise like switching Weller soldering iron, Env. chamber relays, RF from long cable... etc.

There is an explanation for every event, if you dig deeper., shield, inject noise radiated nearby etc, the bootstrapped input may be very high impedance and amplify stray noise.

It is very important you document all the variables for each experiment, like temp, C values, P/N. etc.

Who makes the EVA board?

The chamber is not a perfect Faraday Cage as your I/O cable and DC Pwr cable can radiate noise inside. either diff. mode or common mode or both.
"What is the tempco for OpAmp Vio?"
The opamp I used here is LMC6482 http://www.ti.com/lit/ds/symlink/lmc6482.pdf
do you have specs for EVA?
The specification is written in Japanese, **broken link removed**. here I translate some information I think is important.
**broken link removed**
**broken link removed**
What are part numbers andor values for Cn, Cp, Cfb?
Part number of Cp and Cn are **broken link removed** . They are both 10pF capacitors. Cfb is build-in capacitor of a chip on the board from the company.
What is Square wave freq and details of ADC timing ?
According to manual, frequency is 800KHz.
Ceramic is very sensitive to V,T,vibe etc. and dielectric absorption. Try plastic caps.
Will do and update result.
Who makes the EVA board?
The board is made by the company, I soldered the components on it by myself.
Cap leads are pretty long and exposed to radiated noise like switching Weller soldering iron, Env. chamber relays, RF from long cable... etc.
There is an explanation for every event, if you dig deeper., shield, inject noise radiated nearby etc, the bootstrapped input may be very high impedance and amplify stray noise.
The chamber is not a perfect Faraday Cage as your I/O cable and DC Pwr cable can radiate noise inside. either diff. mode or common mode or both

I am from mechanical engineering, I am not clear about quite some terms you used. seems this problem is a little bit out of my capability. If you don't mind, would you please tell me what kind of change can I do? I know I can use better capacitors and short the leads and what about others? If the chamber doesn't work, is there any replacement?
 
One thing that comes to mind, have you cleaned all the flux residue from around the solder joints where the test capacitors are attached to the evaluation board?
Also on the extender board with the DIP socket?

If not, I suggest that you try cleaning them with iso-propyl alcohol or something similar.

JimB
When I first did the test, I use flux and didn't clean it, the result is seriously bad. Later, I didn't use flux to help soldering and clean the board with acetone, the result get better, but still the drift exists.
 
I would like to see what are the results if you change the capacitors under test, close the oven, wait for 24 hours and THEN, not before, you start measuring.

From all physical variables, temperature is likely the one most affected by direct manipulation.

I was surprised by the ritual and long periods used to measure voltage references. Why not here?
You mean change the capacitors to a different capacitance?
I was surprised by the ritual and long periods used to measure voltage references. Why not here?
Not clear what you mean, you mean the time is still not long enough?
 
What is your preset sensitivity? 150V/pF? according to datasheet, I think

on EP forum, I indicated...

  • The noise and drift are separate issues unless there is large CM stray e-field getting rectified asymmetrically by the integrator.
  • The drift may come from any source. You can start with a heat gun and cold spray to check for drift due to Input offset current sensitivity, which ought to be very good by design.
  • Then supply sensitivity.
  • Then stray capacitance sensitivity by monitoring integrator output on scope and touch ground, CM signal , move hand around fixture... etc to determine effects of stray coupling and need for shield over DUT if necessary.
  • Then check for change in RH which for air changes dielectric constant so breathing into open input terminals may be detected from differential C from %Rh
  • then check for vibration sensitivity by vibrating fixture and monitor integrator output. then check Cp, Cn signals on scope for ringing using zero scope gnd length with tip/barrel, and clip removed. Verify S/H occurs after settling by probing cct board switch to Cfb.
  • *** then check for Seebeck effects of intermetallic joints to see if uV offset of tin plate vs gold plate or nickle plate contacts on fixture has an effect.
  • This is just a start
  • if 150V/pF is correct then 1 V drift = 0.0067 pF , which is programmable
  • what are your settings?
  • *** Correct use of SiS common mode buffer for shielding is critical to avoid microphonic and stray drift.
 
keep in mind , dielectric absorption is a memory effect due to contaminants or wet electrolytics which can be >15% and polypropylene 0.1%

Perhaps %RH is a factor as water is a highly polar dielectric and d=80 depending on many factors.

eliminate all stray dielectrics between Cp,Cn pins and common mode SiS buffer out used as air twisted magnet wire shield.

Keep cap signal paths as short as possible., not long leaded parts on ext. board.

If your drift is indeed 0.007 pF or 150V/pF then this is about 1% of the capacitance between two of your fingers 1cm apart, or a microscopic change in lead position of the caps or your fixture, which I suggest your remove.
 
Yes, those might be the factors causing the drift. But I think putting the setup in a chamber should eliminate these factors. But I can still see the drift.
The chamber might eliminate them, and it might not. One experiment you can perform to see if any of those environmental factors might be causing your drift would be to continue using the chamber, but first enclose your circuit and its test capacitors in a sealed plastic bag wrapped in some sort of thermal insulation, such as a cloth towel. Then turn on the chamber and allow plenty of time for things to stabilize (several hours, at least) before taking measurements. Taking these steps should effectively isolate your circuit from environmental influences like temperature fluctuations, humidity changes, and air movement. If you still see drift to the same degree that you're seeing now, then the problem most likely lies elsewhere.
 
You mean change the capacitors to a different capacitance?

Not precisely. I was making reference to the handling to prepare them for the measurements.

You mean change the capacitors to a different capacitance?
I was surprised by the ritual and long periods used to measure voltage references. Why not here?
Not clear what you mean, you mean the time is still not long enough?

I will not dare to issue an opinion. In the EEVBlog there are those who deal with voltage references and I read some measurements taken along four days.

Anyway, do not take me as qualified to suggest anything. Sorry.
 
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