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Yes...If you right click on the part, it states "External Sync capability is not modeled". I guess it should state "ena/sync functionality is not modeled".
Thankyou very much , do you know why the sync circuit for LT1248, on page 8, figure 3 of the datasheet, has pull-ups to Vcc and Vref?
-I would have thought either one or the other, but not both, was sufficient?
The SYNC function of any LTC device is not modelled in LTspice (especially dc/dc converters). If an LTspice model has a SYNC pin, then it is normally because that SYNC pin is shared with another function and LTspice is modelling that second function and not the SYNC function. Hope that makes sense.
The additional pullup to Vcc is probably because of the leakage current of the VN2222. This can be as high as 200uA, so with just a pull up to VREF, would cause an excessive voltage drop across the pull up resistor. If you lower the pull up resistor value, it would cause too much stress for the output capability of VREF when the FET is ON. The extra pull up path to Vcc overcomes this. The diode stops Vcc back feeding into VREF.
Thankyou SimonBramble, is there actually a current source in the PKlim pin chucking out 50uA?....The block diagram doesn.t show a current source there.
It is probably just horrific bias current coming out of the base of a pnp transistor. The bias currents into and out of the other pins is quite high. This part was released back in 1993 so bias currents (especially on a bipolar process) were much higher back then
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