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Debug-Problem with the dsPIC33EP32GP502

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Jonar

New Member
Hi,

first of all I must say that I'm a German and I haven't the best English, I'm sorry for that.

I work with three microcontroller, two dsPIC33EP32GP502 and one dsPIC33FJ64GP802 and have a problem with the 33EP.
I try to debug a simple LED program. On the 33FJ mic all works fine, but on both 33EP I get the following error, if I try to debug the program:

Programming/Verify complete

The target device is not ready for debugging. Please check your configuration bit settings and program the device before proceeding. The most common causes for this failure are oscillator and/or PGC/PGD settings.


The communication channel is on PGEC2 and PGED2. I have also tried to use the external and the internal oscillator but I get always the same error. And the 33FJ is debugging fine with both oscillators.

I use the ICD 3 for debugging, the XC16 compiler and the MPLAB X IDE v3.45 program. And on the dsPIC33EP32GP502 I use the following configuration.

// FICD
#pragma config ICS = PGD2 // ICD Communication Channel Select bits (Communicate on PGEC2 and PGED2)
#pragma config JTAGEN = OFF // JTAG Enable bit (JTAG is disabled)

// FPOR
#pragma config ALTI2C1 = OFF // Alternate I2C1 pins (I2C1 mapped to SDA1/SCL1 pins)
#pragma config ALTI2C2 = OFF // Alternate I2C2 pins (I2C2 mapped to SDA2/SCL2 pins)
#pragma config WDTWIN = WIN25 // Watchdog Window Select bits (WDT Window is 25% of WDT period)

// FWDT
#pragma config WDTPOST = PS32768 // Watchdog Timer Postscaler bits (1:32,768)
#pragma config WDTPRE = PR128 // Watchdog Timer Prescaler bit (1:128)
#pragma config PLLKEN = ON // PLL Lock Enable bit (Clock switch to PLL source will wait until the PLL lock signal is valid.)
#pragma config WINDIS = OFF // Watchdog Timer Window Enable bit (Watchdog Timer in Non-Window mode)
#pragma config FWDTEN = OFF // Watchdog Timer Enable bit (Watchdog timer enabled/disabled by user software)

// FOSC
#pragma config POSCMD = NONE // Primary Oscillator Mode Select bits (Primary Oscillator disabled)
#pragma config OSCIOFNC = ON // OSC2 Pin Function bit (OSC2 is general purpose digital I/O pin)
#pragma config IOL1WAY = ON // Peripheral pin select configuration (Allow only one reconfiguration)
#pragma config FCKSM = CSDCMD // Clock Switching Mode bits (Both Clock switching and Fail-safe Clock Monitor are disabled)

// FOSCSEL
#pragma config FNOSC = FRC // Oscillator Source Selection (Internal Fast RC (FRC))
#pragma config IESO = ON // Two-speed Oscillator Start-up Enable bit (Start up device with FRC, then switch to user-selected oscillator source)

// FGS
#pragma config GWRP = OFF // General Segment Write-Protect bit (General Segment may be written)
#pragma config GCP = OFF // General Segment Code-Protect bit (General Segment Code protect is Disabled)​

Has anyone an idea or can help me so that I can debug with the dsPIC33EP32GP502?

Thanks,
Jonar
 

spec

Well-Known Member
Most Helpful Member
HI Jonar,

Welcome to ETO.

Your English is perfectly comprehensible.

You say you are German but where do you live. If you put it next to 'Location' on your user page it will display in the box at the left of your posts.

spec
 

granddad

Well-Known Member
Hi Jonar.. I have current project with a PIC24EP256MC204 , similar config , no debug problems but with Pickit3, so may be a dead end , also I have different PGxx pins, and PLL clock... Have you tried different clock config...

Edit You have PLLKEN on but FNOSC no PLL ?
Code:
// PIC24EP256MC204 Configuration Bit Settings

// 'C' source line config statements

#include <xc.h>


// FICD
#pragma config ICS = PGD1               // ICD Communication Channel Select bits (Communicate on PGEC1 and PGED1)
#pragma config JTAGEN = OFF             // JTAG Enable bit (JTAG is disabled)

// FPOR
#pragma config ALTI2C1 = OFF            // Alternate I2C1 pins (I2C1 mapped to SDA1/SCL1 pins)
#pragma config ALTI2C2 = OFF            // Alternate I2C2 pins (I2C2 mapped to SDA2/SCL2 pins)
#pragma config WDTWIN = WIN25           // Watchdog Window Select bits (WDT Window is 25% of WDT period)

// FWDT
#pragma config WDTPOST = PS32768        // Watchdog Timer Postscaler bits (1:32,768)
#pragma config WDTPRE = PR128           // Watchdog Timer Prescaler bit (1:128)
#pragma config PLLKEN = ON              // PLL Lock Enable bit (Clock switch to PLL source will wait until the PLL lock signal is valid.)
#pragma config WINDIS = OFF             // Watchdog Timer Window Enable bit (Watchdog Timer in Non-Window mode)
#pragma config FWDTEN = OFF             // Watchdog Timer Enable bit (Watchdog timer enabled/disabled by user software)

// FOSC
#pragma config POSCMD = NONE            // Primary Oscillator Mode Select bits (Primary Oscillator disabled)
#pragma config OSCIOFNC = OFF           // OSC2 Pin Function bit (OSC2 is clock output)
#pragma config IOL1WAY = ON             // Peripheral pin select configuration (Allow only one reconfiguration)
#pragma config FCKSM = CSDCMD           // Clock Switching Mode bits (Both Clock switching and Fail-safe Clock Monitor are disabled)

// FOSCSEL
#pragma config FNOSC = FRCPLL           // Oscillator Source Selection  
#pragma config PWMLOCK = ON            // PWM Lock Enable bit (Certain PWM registers may only be written after key sequence)
#pragma config IESO = OFF               // Two-speed Oscillator Start-up Enable bit (Start up with user-selected oscillator source)

// FGS
#pragma config GWRP = OFF               // General Segment Write-Protect bit (General Segment may be written)
#pragma config GCP = OFF                // General Segment Code-Protect bit (General Segment Code protect is Disabled)
 
Last edited:

Jonar

New Member
NorthGuy: Yes, I tried to run without the debugger. All works fine, except the LED. It doesn't blink, so I tried to debug the program and check the state of some register. That's the start of my debug problem.

granddad: I tried the external and the internal oscillator and with activated PLL and with deactivated PLL. And I have PLLKEN on, because in the description stand, that so the clock switch to PLL will wait until the PLL lock signal is valid. In the case I set the PLLKEN to off, the clock switch will not wait. But I thought, this configuration is irrelevant, because I don't use the PLL in the program, so the clock doesn't switch to the PLL source while the program is running.
But now I also tried to debug with PLLKEN off and FNOSC off, but still have the same problem.
 

granddad

Well-Known Member
Hi Jonar , I just read the IDC 3 data sheet re troubles " below" , I see you on latest MPLABX .

1. What device are you working with? Often an upgrade to a newer version of MPLAB X IDE is required to support newer devices. A yellow light = untested support. 2. Are you using a Microchip demo board or one of your own design? Have you followed the guidelines for resistors/capacitors for communications connections? See Chapter 2. “Operation”. 3. Have you powered the target? The debugger cannot power the target if greater than 100 mA. 4. Are you using a USB hub in your set up? Is it powered? If you continue to have problems, try using the debugger without the hub (plugged directly into the PC.) 5. Are you using the standard communication cable (RJ-11) shipped with the debugger? If you have made a longer cable, it could cause communications errors.

This may help ?
http://www.microchip.com/forums/m957377.aspx
 
Last edited:

NorthGuy

Well-Known Member
NorthGuy: Yes, I tried to run without the debugger. All works fine, except the LED. It doesn't blink, so I tried to debug the program and check the state of some register. That's the start of my debug problem.
Looks like your PIC just doesn't run. Look at things like missing capacitors, bad power etc.
 
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