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DC point and Vcmo: difference

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New Member

While simulating a differntial circuit, sometimes I mix up the concept of an output DC point and the common mode output voltage. I know the theory behind it.. but are they not both at the same DC point ??? Please be kind enougth to elaborate ?


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DC bias is a constant DC signal that is superimposed onto one line.

Common mode voltage is a common signal that is being superimposed onto two or more lines. You can have a common mode voltage that is a DC bias, but the common mode voltage does not necessarily have to be a constant DC (EMI-induced noise for example).

So basically, common mode implies something that is shared between two or more lines. DC bias is self explanatory and doesn't imply sharing between lines.
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