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Current Sense Transformer for Synchronous Buck (non symetrical AC in the CST Primary)

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Flyback

Well-Known Member
Hello,
The attached Current Mode Synchronous Buck converter has a Current sense transformer (CST) to sense the hi-side FET current.
Because this is a Synchronous Buck, the current in the primary of the CST is sometimes AC..(eg when the Buck is lightly loaded)
With no-load on the Sync Buck output, it is “symmetrical” AC current in the CST primary, but when lightly loaded, it is non-symetrical AC current in the primary of the CST.
Do you know of a topology of CST that can ensure equal volt.seconds across the CST secondary through all these conditions of current flow in the CST? (ie to ensure reset of the CST under all conditions of current flow in the CST ..eg symmetrical AC, non-symmetrical AC, Unidirectional)
(When the Buck is fully loaded, the CST primary obviously has “unidirectional” current flow in its primary)

(the Buck is actually a Dual cascaded Buck, but that’s not central to the discussion)

Please find schematic and lightly loaded LTspice simulation attached.
 

Attachments

  • Dual sync buck with CST_2.pdf
    38.5 KB · Views: 146
  • Dual sync buck with CST_2.asc
    24.3 KB · Views: 105
The attached Sync Buck simulation (schematic also attached), has non symmetrical AC current in the CST , but there is very little build up of magnetising current in the secondary of the CST, due to the use of the diode bridge at the CST secondary. Therefore, would you agree that this circuit is fine?
-The secondary magnetising current merely has a 2mA DC level in it. (its saturation level is 52mA).
In fact, even a unipolar CST setup is fine (with only single rectifier diode in the CST secondary), but just has up to 20mA DC level in the secondary magnetising current, which is unwanted, but doesn’t saturate the EP13 (3C96) core, which, with 50 turns, would need the secondary magnetising current to go up to 52mA before saturation was caused.
Anyway, in the attached simulation , the secondary magnetising current is seen by putting “I(L28) + I(L27)/50” into the waveform window.
 

Attachments

  • Dual sync buck with CST_3.pdf
    39.1 KB · Views: 148
  • Dual sync buck with CST_3.asc
    24.5 KB · Views: 107
In relation to the use of CST’s with synchronous Buck’s, the following article has called it totally wrong…………
Article:
**broken link removed**
Her is the duff quote from the above article (which concerns CSTs in sync Bucks)….

[*quote*]Alternatively, a current sense transformer can be exploited, but only if the current sense location is such that the current waveform is zero for part of the switching period to allow transformer reset, e.g. in series with the high-side FET.[*unquote*]

As I have prooven here, the synchronous buck has AC current in the CST when its in that location, and there is no zero current interval, and yet the CST operates perfectly fine, as long as a diode bridge is used in the secondary of the CST.
 
I don't have time to think about your project to:
BUT
I have used CT in many places. I think you are doing what I do. Measure the P-P voltage.
I have used a method for finding the "0" current time and forcing that to be "0" volts but......
Using the P-P voltage you get the P-P current and that works for me.

Many PWMs do not have to have the exact current fed back.
Some really want a slope.
Some want a peak that is some what right.
Most....the error amp compensates just fine with a some what wrong current.
 
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