I see several problems:
1. The maximum allowable clock risetime is 10 usec. Your risetime is nearly 50 msec. You need two Schmitt triggers (CD40106) between your debouncer and the 4027 clock pin.
2. Reset is a logic high level. If you have a normally open switch as shown, you need to connect the switch between +9v and the reset pin. Add a 47k pull down resistor between the reset pin and gnd. If your switch is normally closed, you can leave it where it is, but you still need to add a 47k resistor from the reset pin to +9v.
3. For minimum dissipation, tie all unused INPUT pins on the unused flip-flop to gnd.
4. You need more base drive for your transistor. As drawn, you have less than a milliamp of base drive (remember that the 4027 Q output has some internal resistance). The SL100 has a minimum beta of 40, and this is with a Vce of 10 volts. Beta at saturation (Vce<0.5v or so) will be considerably less. A good rule of thumb is to make Ic/Ib=10. This is very conservative, so you can probably get away with a 1k resistor in the base in place of the 8.2k.
5. Add a 1N4001 diode across the relay coil, cathode to +9v. This will protect the transistor from breakdown due to the flyback pulse from the relay coil that will occur when the transistor turns off.